Intel IXF1104 manual DTPA_0:3, Stpa, Ptpa, Datasheet

Models: IXF1104

1 227
Download 227 pages 3.32 Kb
Page 91
Image 91
DTPA_0:3:

IXF1104 Quad-Port 10/100/1000 Mbps Ethernet Media Access Controller

The IXF1104 provides the following three types of TPA signals:

Dedicated per port Direct Transmit Packet Available (DTPA)

Selected-PHY Transmit Packet Available (STPA), which is based on the current in-band port address in MPHY mode.

Polled-PHY Transmit packet Available (PTPA), which provides FIFO information on the port selected by the TADR[1:0] signals.

The following three TPA signals (DTPA_0:3, STPA, and PTPA) provide flow control based on the programmable TX FIFO High and Low watermarks. Refer to Table 132 “TX FIFO High Watermark Ports 0 - 3 ($0x600 – 0x603)” on page 202 and Table 133 “TX FIFO Low Watermark Register Ports 0 - 3 ($0x60A – 0x60D)” on page 203 for more information.

DTPA_0:3:

A direct status indication for the TX FIFOs of ports [0:3]. When DTPA is High, it indicates the amount of data in the TX FIFO is below the TX FIFO High watermark. When the High watermark is crossed, DTPA transitions Low to indicate the TX FIFO is almost full. It stays low until the amount data in the TX FIFO goes back below the TX FIFO Low watermark. At this point, DTPA transitions High to indicate the programmed number of bytes are now available for data transfers.

DTPA_0:3 is updated on the rising edge of the TFCLK.

STPA:

STPA provides TX FIFO status for the currently selected port in MPHY mode. When High, STPA indicates that the amount of data in the TX FIFO for the port selected, specified by the latest in- band address, is below the TX FIFO High watermark. When the High watermark is crossed, STPA transitions Low to indicate the TX FIFO is almost full. It stays Low until the amount of data in the TX FIFO goes back below the TX FIFO Low watermark. At this point, STPA transitions High to indicate the programmed number of bytes are now available for data transfers.

The port reported by STPA is updated on the rising edge of TFCLK after TSX is sampled as asserted. STPA is updated on the rising edge of TFCLK.

Note: STPA is only used when the IXF1104 is configured for MPHY mode of operation.

PTPA:

PTPA provides status of the TX FIFO based on the port selected by the TADR[1:0] address bus.

When High, PTPA indicates that the amount of data in the TX FIFO for the port selected is below the TX FIFO High watermark. When the High watermark is crossed, PTPA transitions Low to indicate the TX FIFO is almost full. It stays Low until the amount of data in the TX FIFO goes back below the TX FIFO Low watermark. PTPA then transitions High to indicate the programmed number of bytes are now available for data transfers.

The port reported by PTPA is updated on the rising edge of TFCLK after the TADR{1:0] port address is sampled.

PTPA is updated on the rising edge of TFCLK.

Datasheet

91

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004

Page 91
Image 91
Intel IXF1104 manual DTPA_0:3, Stpa, Ptpa, Datasheet