Intel IXF1104 manual SPI3 Interface Signal Descriptions Sheet 4, DTPA03 Direct Transmit Packet

IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 3. SPI3 Interface Signal Descriptions (Sheet 4 of 8)

Signal Name		Ball	Type	Standard	Description
MPHY	SPHY	Designator
					DTPA_0:3 Direct Transmit Packet
					Available.
					A direct status indication for transmit FIFOs
					of ports 0:3.
					When High, DTPA indicates that the amount
					of data in the TX FIFO is below the TX FIFO
					High watermark. When the High watermark
					is crossed, DTPA transitions Low to indicate
					that the TX FIFO is almost full. It stays Low
					until the amount of data in the TX FIFO
DTPA_0	DTPA_0	D3			goes back below the TX FIFO Low
					watermark. At this point, DTPA transitions
DTPA_1	DTPA_1	L1	Output	3.3 V
					High to indicate that the programmed
DTPA_2	DTPA_2	A9		LVTTL
					number of bytes are now available for data
DTPA_3	DTPA_3	J7
					transfers.
					NOTE: For more information, see
					Table 132 “TX FIFO High
					Watermark Ports 0 - 3 ($0x600 –
					0x603)” on page 202 and Table 133
					“TX FIFO Low Watermark Register
					Ports 0 - 3 ($0x60A – 0x60D)” on
					page 203.
					DTPA is updated on the rising edge of
					TFCLK.
					Selected-PHY Transmit Packet Available.
					STPA is only meaningful in a 32-bit multi-
					PHY mode.
					STPA is a direct status indication for
					transmit FIFOs of ports 0:3.
					When High, STPA indicates that the amount
					of data in the TX FIFO, specified by the
					latest in-band address, is below the
					TX FIFO High watermark. When the High
					watermark is crossed, STPA transitions Low
					to indicate the TX FIFO is almost full. It
					stays Low until the amount of data in the
					TX FIFO goes back below the TX FIFO Low
					watermark. At this point, STPA transitions
				3.3 V	High to indicate that the programmed
STPA	NA	C11	Output		number of bytes are now available for data
				LVTTL
					transfers.
					NOTE: For more information, see
					Table 132 “TX FIFO High
					Watermark Ports 0 - 3 ($0x600 –
					0x603)” on page 202 and Table 133
					“TX FIFO Low Watermark Register
					Ports 0 - 3 ($0x60A – 0x60D)” on
					page 203.
					STPA provides the status indication for the
					selected port to avoid FIFO overflows while
					polling is performed. The port reported by
					STPA is updated on the following rising
					edge of TFCLK after TSX is sampled as
					asserted. STPA is updated on the rising
					edge of TFCLK.

Datasheet 41

Document Number: 278757

Revision Number: 007

Revision Date: March 25, 2004