Troubleshooting

 

 

 

 

Selftest Failures

Table 3-2. Chassis Codes for the B2000 Workstation

 

 

 

 

 

Ostat

Code

FRU

Message

Description

 

 

 

 

 

FLT

1n13

SYS BD

data mem brk trp

CPU n detected an unexpected data

 

 

 

 

memory break trap.

 

 

 

 

 

FLT

1n14

SYS BD

TLB dirty bit tr

CPU n detected an unexpected TLB dirty

 

 

 

 

bit trap.

 

 

 

 

 

FLT

1n15

SYS BD

page refrnce trp

CPU n detected an unexpected page

 

 

 

 

reference trap.

 

 

 

 

 

FLT

1n16

SYS BD

assist emul trap

CPU n detected an unexpected assist

 

 

 

 

emulation trap.

 

 

 

 

 

FLT

1n17

SYS BD

hi-priv xfer trp

CPU n detected an unexpected

 

 

 

 

higher-privilege transfer trap.

 

 

 

 

 

FLT

1n18

SYS BD

lo-priv xfer trp

CPU n detected an unexpected

 

 

 

 

lower-privilege transfer trap.

 

 

 

 

 

FLT

1n19

SYS BD

taken branch trp

CPU n detected an unexpected

 

 

 

 

taken-branch trap.

 

 

 

 

 

FLT

1n1A

SYS BD

data mem acc rts

CPU n detected an unexpected data

 

 

 

 

memory access rights trap.

 

 

 

 

 

FLT

1n1B

SYS BD

data mem prot ID

CPU n detected an unexpected data

 

 

 

 

memory protection ID trap.

 

 

 

 

 

FLT

1n1C

SYS BD

unalign data ref

CPU n detected an unexpected unaligned

 

 

 

 

data reference trap.

 

 

 

 

 

FLT

1n1D

SYS BD

perf mon intrrpt

CPU n detected an unexpected

 

 

 

 

performance monitor interrupt.

 

 

 

 

 

TST

1n20

SYS BD

CPUn basic test

CPU n is starting its basic operations

 

 

 

 

self-test.

 

 

 

 

 

TST

1n21

SYS BD

CPUn alu test

CPU n is starting its arithmetic and

 

 

 

 

logical unit self-test.

 

 

 

 

 

TST

1n22

SYS BD

CPUn branch test

CPU n is starting its branch instruction

 

 

 

 

self-test.

 

 

 

 

 

TST

1n23

SYS BD

CPUn arith cond

CPU n is starting its arthimetic condition

 

 

 

 

self-test.

 

 

 

 

 

TST

1n24

SYS BD

CPUn bit opers

CPU n is starting its bit operation

 

 

 

 

instruction self-test.

 

 

 

 

 

TST

1n25

SYS BD

CPUn cntrl regs

CPU n is starting its control register

 

 

 

 

self-test.

 

 

 

 

 

TST

1n26

SYS BD

CPUn ext intrpt

CPU n is starting its external interrupt

 

 

 

 

self-test.

 

 

 

 

 

Chapter 3

55