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Troubleshooting
Selftest Failures
Table 3-2. Chassis Codes for the B2000 Workstation
Ostat | Code | FRU | Message | Description |
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WRN | 4n01 | SYS BD | CPUn skip lst | CPU n is bypassing its late |
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| save time. |
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TST | 4n0E | SYS BD | CPUn exit lst | CPU n finished its late |
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TST | 4n20 | SYS BD | CPUn lst erly st | CPU n is |
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| |
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TST | 4n21 | SYS BD | CPUn lst basic | CPU n is |
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| |
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TST | 4n22 | SYS BD | CPUn lst alu | CPU n is |
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| logic unit |
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TST | 4n23 | SYS BD | CPUn lst branch | CPU n is |
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| instruction |
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TST | 4n24 | SYS BD | CPUn lst arth cd | CPU n is |
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| conditions |
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TST | 4n25 | SYS BD | CPUn lst bit ops | CPU n is |
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| |
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TST | 4n26 | SYS BD | CPUn lst ctl reg | CPU n is |
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| |
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TST | 4n27 | SYS BD | CPUn lst ext int | CPU n is |
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| interrupt |
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TST | 4n28 | SYS BD | CPUn lst itimer | CPU n is |
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| |
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TST | 4n29 | SYS BD | CPUn lst mltimed | CPU n is |
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| instructions |
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TST | 4n2A | SYS BD | CPUn lst shadow | CPU n is |
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| |
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TST | 4n2B | SYS BD | CPUn lst dg regs | CPU n is |
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| register |
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TST | 4n2C | SYS BD | CPUn lst rdrs | CPU n is |
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| register |
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TST | 4n2D | SYS BD | CPUn lst bypass | CPU n is |
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| operation |
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TST | 4n30 | SYS BD | CPUn cache byte | CPU n is starting its data cache |
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| operations |
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TST | 4n40 | SYS BD | CPUn cache flush | CPU n is starting its cache flush |
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TST | 4n50 | SYS BD | CPUn icache miss | CPU n is starting its instruction cache |
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| miss |
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60 | Chapter 3 |