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| Troubleshooting |
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| Selftest Failures |
Table | ||||
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Ostat | Code | FRU | Message | Description |
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FLT | 3n09 | SYS BD | bad sys mde byte | CPU n detected an unsupported system |
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| mode. |
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WRN | 3n1A | SYS BD | hversion mismtch | Stable store hardware version doesn’t |
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| match system. |
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TST | 3n1B | SYS BD | chck model strng | Check model string with version in stable |
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| store. |
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WRN | 3n1B | SYS BD | model str msmtch | Model string doesn’t match that in stable |
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| store. |
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FLT | 3n1B | SYS BD | fatal model str | Error reading model string from stable |
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| store. |
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TST | 3n1C | SYS BD | test software ID | Check LANIC address. |
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WRN | 3n1C | SYS BD | update sw ID | Update LANIC address. |
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FLT | 3n1C | SYS BD | update sw ID err | Error updating LANIC address. |
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INI | 3n2s | SYS BD | Invoke LDB: s | CPU n is awaiting the |
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| for s more seconds. |
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TST | 3nBC | IO BD | test sys clocks | CPU n is verifying processor clocks with |
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| the |
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INI | 3nBC | SYS BD | init sys clocks | CPU n has initialized the processor clocks. |
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FLT | 3nBC | IO BD | RTC tick timeout | The |
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| not at all. |
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FLT | 3nCD | IO BD | RTC tick timeout | The real time clock is ticking too slowly or |
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| not at all. |
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TST | 3nCD | SYS BD | check defaults | CPU n is initializing stable store values to |
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| system defaults. |
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INI | 3nCD | SYS BD | init defaults | CPU n finished initializing stable store |
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| values. |
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FLT | 3nCD | SYS BD | init EEPROM err | CPU n detected an error writing to stable |
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| store. |
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FLT | 3nEC | SYS BD | bad sys config | CPU n detected an illegal CPU board |
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| configuration. |
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FLT | 3nF4 | SYS BD | EEPROM boot limt | CPU n detected a fatal error writing the |
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| EEPROM. |
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FLT | 3nFC | SYS BD | bad sys bd id | CPU n cannot identify CPU board. |
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TST | 4n00 | SYS BD | CPUn start lst | CPU n is starting its late (with memory) |
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Chapter 3 | 59 |