![](/images/new-backgrounds/1125774/125774277x1.webp)
Pin | Used | Sig. Name | I/O | Active | Note | |
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42 | A6 |
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| Address signal | |
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43 | A5 |
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| Address signal | |
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44 | A4 |
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| Address signal | |
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45 | A3 |
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| Address signal | |
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46 | A2 |
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| Address signal | |
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47 | A1 |
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| Address signal | |
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48 | A0 |
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| Address signal | |
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49 | D0 |
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| Data signal | |
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50 | D1 |
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| Data signal | |
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51 | D2 |
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| Data signal | |
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52 | D3 |
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| Data signal | |
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53 | D4 |
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| Data signal | |
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54 | D5 |
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| Data signal | |
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55 | D6 |
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| Data signal | |
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56 | D7 |
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| Data signal | |
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57 | DPFC | O | H | |||
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58 | DRRC | O | H | Transport roller clutch signal | ||
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59 | PS | O | — Not Used | |||
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60 | /RD |
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| ROM READ pin | |
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61 | /WR |
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| Stepping motor data | |
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| WRITE pin | |
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62 | /AS |
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| Address strobe pin | |
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63 | /CLK |
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| System clock pin | |
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64 | /WAIT |
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| Wait pin | |
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(3) Stepping motor (PAM1, PAM2) drive circuit
The write data is latched by the HC374 at the writing timing of exter- nal address. When the stepping motor output signal
Write address | Data bus | Drive signal | ACT |
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H'FF80 | D0 | PAM1 A | H |
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H'FF80 | D1 | PAM1/A | H |
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H'FF80 | D2 | PAM1 B | H |
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H'FF80 | D3 | PAM1/B | H |
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H'FF80 | D4 | PAM2 A | H |
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H'FF80 | D5 | PAM2/A | H |
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H'FF80 | D6 | PAM2 B | H |
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H'FF80 | D7 | PAM2/B | H |
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*The power source is driven by VB.
Stepping motor time chart
A
B
A
B
A
Phase A
+24V
Phase A
A | Phase B Phase B |
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B +24V B
A:Stepping motor phase A coil drive circuit
B:Stepping motor phase B coil drive circuit
A:Stepping motor phase A coil drive circuit
B:Stepping motor phase B coil drive circuit
(4) ADU motor (DDM) drive circuit
The CPU supplies signals of two systems, which are process by the hardware to drive DDM.
Drive and
When paper enters the ADU, DDM is driven with DDM_DIR at LOW, Q3 is turned ON and Q1 is turned OFF.
When DDM_PWM is HIGH, Q2 is turned OFF and Q4 is turned ON by Q3.
In IC8, therefore,
The motor rotation is controlled with the PWM control.
When paper is discharged from the ADU, DDM_DIR is HIGH, Q3 is turned OFF and Q1 is turned ON.
When DDM_PWM is HIGH, Q4 is turned OFF and Q2 is turned ON by Q1.
In IC8, therefore,
The motor rotation is controlled with the PWM control.
When the motor is not driven, DDM_PWM and DDM_DIR are LOW.
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