Chapter 3: Testing Performance

To test the single-clock, single-edge, state acquisition

Verify the test signal

1Check the clock period. Using the oscilloscope, verify that the master-to- master clock time is 5.000 ns, +0 ps or 100 ps:

a In the oscilloscope Timebase menu, select Scale: 1.000 ns/div.

b In the oscilloscope Timebase menu, select Position. Using the oscilloscope knob, position the clock waveform so that a rising edge appears at the left of the display.

c On the oscilloscope, select [Shift] Period: channel 2, then select [Enter]

to display the clock period (Period(2)). If the period is not less than 5.000 ns, go to step d. If the period is less than 5.000 ns, go to step 2.

d In the oscilloscope Timebase menu, increase Position 5.000 ns. If the period is not less than 5.000 ns, decrease the pulse generator Period in until one of the two periods measured is less than 5.000 ns.

2Check the data pulse width. Using the oscilloscope, verify that the data pulse width is 2.500 ns, +0 ps or 100 ps.

a In the oscilloscope Timebase menu, select Position. Using the oscilloscope knob, position the data waveform so that the waveform is centered on the screen.

b On the oscilloscope, select [Shift] + width: channel 1, then select [Enter] to display the data signal pulse width (+ width(1)).

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Agilent Technologies 1680, 1690 manual Verify the test signal