Agilent Technologies 1680, 1690 manual Verify the test signal

Chapter 3: Testing Performance

To test the single-clock, multiple-edge, state acquisition

Verify the test signal

1Check the clock period. Using the oscilloscope, verify that the master-to- master clock time is 5.000 ns, +0 ps or –100 ps:

a Enable the pulse generator channel 1, channel 2, and trigger outputs (LED off).

b In the oscilloscope Timebase menu, select Scale: 2.000 ns/div.

c In the oscilloscope Timebase menu, select Position. Using the oscilloscope knob, position the clock waveform so that a rising edge appears at the left of the display.

d On the oscilloscope, select [Shift] + width: channel 2, then select [Enter] to display the master-to-master clock time (+ width(2)). If the positive-going pulse width is more than 5.000 ns, go to step e. If the positive-going pulse width is less than or equal to 5.000 ns but greater than 4.900 ns, go to step 2.

e On the oscilloscope, select [Shift] - width: channel 2, then select [Enter] (- width(2)). If the negative pulse width is less than or equal to 5.000 ns but greater than 4.900 ns, go to step 2.

f Adjust the pulse generator Period and Channel 1 width until the oscilloscope + width (2) or - width (2) reads less than or equal to 5.000 ns, but greater than 4.900 ns.

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