IBM SG24-4817-00 manual Switching Scenarios, Switching the Switch Chip, Point-to-Point Routing

This soft copy for use by IBM employees only.

4.The SFE_down performs the appropriate label-swapping, calculates a new HEC, and forwards the 53-byte cell across the physical interface.

Blade number 0 is assigned to the blade for the base unit.

Note

The blade number is used for the internal switching and is different from physical slot number.

3.2.1.3 Switching the Switch Chip

When the IBM 8285 Expansion Chassis, with its switch-on-a-chip, is connected, the connection between the base unit′s CAD_up and CAD_down is disabled, and all traffic flows through the switch-on-a-chip. This means that Step 2 above becomes the following:

•2A. The CAD_up prepares the internal cell and forwards it across the expansion interface cable to the switch-on-a-chip.

•2B. The switch-on-a-chip decides which blade(s) to forward the cell to and forwards it to the CAD_down of the target blade(s) for further handling.

3.2.2Switching Scenarios

The following describes the process of how cells are switched from one port to another port in the IBM 8285. To understand this process it is best to follow a cell as it enters one port and exits another and to see what actually happens as it goes through the various components. Please refer to 3.2.1.1, ªInternal Cell Formatº on page 22, as the following discussion assumes that you are already familiar with the internal cell format.

•Point-to-Point Routing

The following describes what happens to a cell in a point-to-point connection:

1.Receive the cell.

a.CAD_Up prepares in advance, for every port, the address of the next cell assembly buffer. This is the location where the internal cell will be built in CAD_Store.

b.An ATM cell is received by SFE_Up. Here the HEC of the ATM header gets checked. If it is a bad cell, it is discarded, otherwise the HEC is stripped and the remaining 52 bytes are delivered to CAD_Up.

c.The connection from SFE_Up to CAD_Up is 32-bits wide so the cell is transferred in 13 4-byte blocks. There are port lines between SFE_Up and CAD_Up which indicate what port the cell came from. Using these port lines, the 4-byte block transfers can be mixed from different ports. For example, deliver a 4-byte block from Port 1, then deliver a 4-byte block from Port 2, then deliver a 4-byte block from Port 1 and so on. This ensures that no time is wasted in delivering data from a port that has no cells.

d.When the first 4-byte block of a cell gets transferred, one of the control lines is raised to indicate the beginning of a cell.

e.The SFE forwards each 4-byte block of the cell to CAD_Up, which stores it in CAD_Store using the address of the next cell assembly buffer prepared previously. However, CAD_Up skips the first 8 bytes, which are reserved for the routing header, before it stores the first

Chapter 3. Functional Overview of the IBM 8285 25