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4.73 Transmit and Receive FIFO Register for Endpoint 0 (FIFO0)
The Transmit and Receive FIFO Register for Endpoint 0 (FIFO0) is shown in Figure 88 and described in Table 89.
Figure 88. Transmit and Receive FIFO Register for Endpoint 0 (FIFO0)
31 | 0 |
DATA
LEGEND: R/W = Read/Write;
Table 89. Transmit and Receive FIFO Register for Endpoint 0 (FIFO0) Field Descriptions
Bit | Field | Value | Description |
DATA |
| Writing to these addresses loads data into the Transmit FIFO for the corresponding endpoint. | |
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| Reading from these addresses unloads data from the Receive FIFO for the corresponding |
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| endpoint. |
134 | Universal Serial Bus (USB) Controller | |
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