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4.2Status Register (STATR)
The Status Register (STATR) is shown in Figure 17 and described in Table 18.
Figure 17. Status Register (STATR)
31 |
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| 16 |
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| Reserved |
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15 |
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| 1 | 0 |
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| Reserved | DRVVBUS |
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LEGEND: R = Read only; |
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| Table 18. Status Register (STATR) Field Descriptions |
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Bit | Field | Value | Description |
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Reserved | 0 | Reserved |
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0 | DRVVBUS |
| Current DRVVBUS value. |
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| 0 | DRVVBUS value is logic 0 |
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| 1 | DRVVBUS value is logic 1 |
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4.3RNDIS Register (RNDISR)
The RNDIS Register (RNDISR) is shown in Figure 18 and described in Table 19.
Figure 18. RNDIS Register (RNDISR)
31 | 20 | 19 | 18 | 17 | 16 |
Reserved |
| RX4EN | RX3EN | RX2EN | RX1EN |
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15 | 4 | 3 | 2 | 1 | 0 |
Reserved |
| TX4EN | TX3EN | TX2EN | TX1EN |
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LEGEND: R/W = Read/Write; R = Read only; |
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| Table 19. RNDIS Register (RNDISR) Field Descriptions |
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Bit | Field | Value | Description |
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Reserved | 0 | Reserved |
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19 | RX4EN | Receive Endpoint 4 RNDIS mode enable. |
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18 | RX3EN | Receive Endpoint 3 RNDIS mode enable. |
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17 | RX2EN | Receive Endpoint 2 RNDIS mode enable. |
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16 | RX1EN | Receive Endpoint 1 RNDIS mode enable. |
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Reserved | 0 | Reserved |
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3 | TX4EN | Transmit Endpoint 4 RNDIS mode enable. |
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2 | TX3EN | Transmit Endpoint 3 RNDIS mode enable. |
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1 | TX2EN | Transmit Endpoint 2 RNDIS mode enable. |
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0 | TX1EN | Transmit Endpoint 1 RNDIS mode enable. |
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Universal Serial Bus (USB) Controller | 83 | |||
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