Texas Instruments TMS320DM357 manual Setup Phase of a Control Transaction Flow Chart

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3.2.1.1Setup Phase

For the SETUP Phase of a control transaction (Figure 9), the software driving the US host device needs to:

1.Load the 8 bytes of the required Device request command into the Endpoint 0 FIFO.

2.Set SETUPPKT and TXPKTRDY (bits 3 and 1 of HOST_CSR0, respectively).

Note: These bits must be set together.

The controller then proceeds to send a SETUP token followed by the 8-byte command to Endpoint 0 of the addressed device, retrying as necessary. (On errors, controller retries the transaction three times.)

	Figure 9. Setup Phase of a Control Transaction Flow Chart
			Transaction
			scheduled
			TxPktRdy	No
			and SetupPkt
			both set
			?
			Yes
			SETUP token sent
			DATA0 oacket sent
						Command not
			Stall		RxStall set	supported by
				Yes		target
					TxPktRdy cleared
			received
					Error Count cleared
			?
					interrupt generated
			No
			ACK	Yes	TxPktRdy cleared
			received		Error Count cleared
			?		Interrupt generated
			No
					Transaction
No	NAK limit	Yes	NAK		complete
	reached		received
	?		?
Error count
cleared			No
	Yes		Error count
	NAK Timeout set		incremented
	Endpoint halted
	Interrupt generated					Implies problem
			Error		Error bit set	at peripheral end
		No		Yes		of connection.
					TxPktRdy cleared
			count=3
					Error Count cleared
			?
					interrupt generated
						Transaction deemed
						complete
SPRUGH3–November 2008					Universal Serial Bus (USB) Controller		45

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