USB Controller Host and Peripheral Modes Operation | www.ti.com |
RNDIS Mode Setup
The setup of RNDIS mode DMA is similar to the default Transparent Mode as mentioned in the previous section. The following steps need to be taken for setting up RNDIS mode Tx DMA:
∙After reset the software must write zeroes to all Tx DMA State registers (TCPPIDMASTATEW0, TCPPIDMASTATEW1, TCPPIDMASTATEW2, TCPPIDMASTATEW3, TCPPIDMASTATEW4, TCPPIDMASTATEW5).
∙The software constructs transmit queue in memory (one or more DMA Packets in for transmission).
∙Enable DMA for the endpoint in the PERI_TXCSR or HOST_TXCSR by setting the DMAEN bit.
∙Enable the DMA ports by setting TCPPI_ENABLE bit of TCPPICR register.
∙Set RNDIS bit of CTRLR register for enabling RNDIS mode for all channels or set TXnEN bit of RNDISR register for specific DMA channel n.
∙Write the head of the queue descriptor pointer to the TCPPIDMASTATEW0 register to start the DMA.
∙The USB controller will start transmitting data.
∙If the DMA packet size is exact multiple of USB MaxPktSize, a zero byte packet is transmitted and interrupt associated with the DMA channel is asserted.
∙If the DMA packet size is not exact multiple of USB MaxPktSize, the last USB packet transmitted is a short packet and interrupt associated with the DMA channel is asserted.
Transparent Mode Setup
Transparent DMA configuration is identical to RNDIS DMA configuration with the exception of the followings: Each packet is defined by a single buffer descriptor with SOP and EOP bit fields set. Packet size is not bounded to be a multiple of 64 byte but by max packet size. CTRLR.RNDIS bit field should be cleared to zero.
3.3.1.7DMA Channel TearDown
The DMA also supports a teardown operation on TX channels. Teardown allows software to terminate the current Tx queue by notifying the DMA. The DMA will stop the current Tx DMA for that channel, and update the channel parameters to remove all Tx descriptors from that queue. Then the software is free to reclaim the buffers without worry of interrupting the DMA in progress.
Teardown of Tx channels is done using the TCPPITDR register. If the READY bit of TCPPITDR register is set, it signifies that the Tx channel can be torn down. The channel number should be written in the CHANNEL field of TCPPITDR register to teardown the channel.
Note that the software must also teardown the core after the DMA. Software should specify that the following steps are all completed before assuming teardown has completed successfully.
1.After tearing down the channel, DMA interrupt should be generated and the TCPPICOMPPTR register will be FFFF FFFCh. This indicates that the DMA has completed the teardown and all the data buffers can be reclaimed.
2.The software must set the FLUSHFIFO bit of the PERI_TXCSR or HOST_TXCSR register for the endpoint to be torn down.
After both the DMA and the core are torn down, the DMA channel and endpoint can be restarted cleanly. A failure to perform either of these steps could result in data loss or spurious data upon restart.
3.3.2DMA Receive Operation
For receive operation, the software has to program the DMA channel with a chain of receive buffers.
3.3.2.1Receive Buffer
A receive buffer is a contiguous block of memory used to store received data. Each Rx buffer has a corresponding Rx buffer descriptor. Each Rx buffer can be linked together with other Rx buffers to make a DMA packet or a queue of DMA packets.
Receive buffers are byte aligned structures located in processor’s main memory. Rx buffer size may vary from 1 to 65,535 bytes.
62 | Universal Serial Bus (USB) Controller |
