OTG Device Control Register Devctl | Texas Instruments TMS320DM357

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Registers

4.78 OTG Device Control Register (DEVCTL)

The OTG Device Control Register (DEVCTL) is shown in Figure 93 and described in Table 94.

LEGEND: R/W = Read/Write; R = Read only; -n= value after reset

Bit	Field	Value	Description
7	BDEVICE		This read-only bit indicates whether the USB controller is operating as the 'A' device or the 'B'
			device.
		0	'A' device
		1	'B' device
			Only valid while a session is in progress.
6	FSDEV	0-1	This read-only bit is set when a full-speed or high-speed device has been detected being connected
			to the port (high-speed devices are distinguished from full-speed by checking for high-speed chirps
			when the device is reset). Only valid in Host mode.
5	LSDEV	0-1	This read-only bit is set when a low-speed device has been detected being connected to the port.
			Only valid in Host mode.
4-3	VBUS	0-3h	These read-only bits encode the current VBus level as follows:
		0	Below Session End
		1h	Above Session End, below AValid
		2h	Above AValid, below VBusValid
		3h	Above VBusValid
2	HOSTMODE	0-1	This read-only bit is set when the USB controller is acting as a Host.
1	HOSTREQ	0-1	When set, the USB controller will initiate the Host Negotiation when Suspend mode is entered. It is
			cleared when Host Negotiation is completed. ('B' device only)
0	SESSION	0-1	When operating as an 'A' device, you must set or clear this bit start or end a session. When
			operating as a 'B' device, this bit is set/cleared by the USB controller when a session starts/ends.
			You must also set this bit to initiate the Session Request Protocol. When the USB controller is in
			Suspend mode, you may clear the bit to perform a software disconnect.
			A special software routine is required to perform SRP. Details will be made available in a later
			document version.

SPRUGH3–November 2008	Universal Serial Bus (USB) Controller	137
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