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Table 16. Universal Serial Bus (USB) Registers (continued)
Offset | Acronym | Register Description | Section |
546h | PERI_RXCSR | Control Status Register for Peripheral Receive Endpoint | Section 4.62 |
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| (peripheral mode) |
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| HOST_RXCSR | Control Status Register for Host Receive Endpoint | Section 4.63 |
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| (host mode) |
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548h | RXCOUNT | Number of Bytes in Host Receive endpoint FIFO | Section 4.65 |
54Ah | HOST_TXTYPE | Sets the operating speed, transaction protocol and peripheral | Section 4.67 |
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| endpoint number for the host Transmit endpoint. |
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54Bh | HOST_TXINTERVAL | Sets the polling interval for Interrupt/ISOC transactions or the | Section 4.69 |
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| NAK response timeout on Bulk transactions for host Transmit |
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| endpoint. |
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54Ch | HOST_RXTYPE | Sets the operating speed, transaction protocol and peripheral | Section 4.70 |
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| endpoint number for the host Receive endpoint. |
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54Dh | HOST_RXINTERVAL | Sets the polling interval for Interrupt/ISOC transactions or the | Section 4.71 |
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| NAK response timeout on Bulk transactions for host Receive |
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| endpoint. |
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4.1Control Register (CTRLR)
The Control Register (CTRLR) is shown in Figure 16 and described in Table 17.
Figure 16. Control Register (CTRLR)
31 |
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| 16 |
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| Reserved |
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15 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
| RNDIS | UINT | Reserved | CLKFACK | RESET |
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LEGEND: R/W = Read/Write; R = Read only; |
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| Table 17. Control Register (CTRLR) Field Descriptions |
Bit | Field | Value | Description |
Reserved | 0 | Reserved | |
4 | RNDIS | RNDIS mode enable. | |
3 | UINT | USB | |
2 | Reserved | 0 | Reserved |
1 | CLKFACK | Clock stop fast ACK enable. | |
0 | RESET |
| Soft reset. |
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| 0 |
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| 1 | Writing a 1 starts a module reset. |
82 | Universal Serial Bus (USB) Controller | |
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