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Example 4. Programming the USB DMA Controller (continued)
rx_desc[i] = 0;
}
//Routine to flush TX fifo.
//Must call this routine twice for
int index_save;
int status;
index_save = | // Save the index to restore later | |
// Set the index to the desired endpoint | ||
status = | // Isolate the TxPktRdy and FIFONotEmpty bits | |
if (!(status)) { | // Nothing showing in FIFO | |
// Set TxPktRdy in case there is a partial | ||
packet already in FIFO |
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} |
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// Write TXCSR with flush | ||
bit set, FIFONotEmpty=0, and TxPktRdy=0. |
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while | // Keep looping until the flush bit clears | |
// Restore the index to previous value | ||
} |
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//Routine to start the TX DMA for a given channel void start_tx_dma(int ch) {
//Must have at least one descriptor before turning on TX DMA if (rx_desc[ch] < 1) {error++;} else {
//Flush FIFO (2 times in case it is
flush_tx_fifo(ch+1);
// Start the DMA
// TXCSR, bit DMAReqEnab | |
} |
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} |
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// Routine to add a TX descriptor
void add_tx_descriptor(int ch, unsigned char * inBuf, int bytes) { if ((bytes < 0) (bytes >65535)) {bytes = 64; error++;}
//Link previous buffer to this one if this is not the first descriptor of the channel if (tx_desc[ch] > 0)
(Uint32)(&tx_bufferDesc[ch][4*tx_desc[ch]]);
// Set up DMA buffer descriptors |
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tx_bufferDesc[ch][4*tx_desc[ch]+0] = (Uint32)(0x00000000); | // Next Descriptor pointer | |
tx_bufferDesc[ch][4*tx_desc[ch]+1] = (Uint32)inBuf; | // Buffer pointer | |
tx_bufferDesc[ch][4*tx_desc[ch]+2] = (0x0000 << 16) bytes; | // [31:16] Buffer offset | |
[15:0] Buffer length |
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if (bytes == 0) bytes = ZERO_BYTE 1; | // Set the ZERO_BYTE bit and size 1 byte | |
tx_bufferDesc[ch][4*tx_desc[ch]+3] = SOP EOP OWNER bytes; | // [31]=SOP, [30]=EOP, | |
[29]=owner, [28]=EOQ, | = rxabort, [15:0]=packet length |
//If DMA already enabled and has stopped, write this to the TX Queue head pointer if
Universal Serial Bus (USB) Controller | 21 |