Epson S1C33210 manual 116

APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS

A.4 SRAM (55ns)

SRAM interface setup examples – 55ns

Operating	Read cycle		Write cycle	Output disable
frequency	Wait cycle	Read cycle		delay time
20MHz	1	2	2	1.5
25MHz	2	3	3	1.5
33MHz	2	3	3	1.5

SRAM interface timing – 55ns

SRAM interface				33MHz		25MHz		20MHz
Parameter	Symbol	Min.	Max.	Cycle	Time	Cycle	Time	Cycle	Time
<Read cycle>
Read cycle time	tRC	55	–	3	90	3	120	2	100
Address access time	tACC	–	55	3	90	3	120	2	100
#CE access time	tACS	–	55	3	90	3	120	2	100
#OE access time	tOE	–	30	2.5	75	2.5	100	1.5	75
Output disable delay time	tOHZ	0	30	1.5	45	1.5	60	1.5	75
<Write cycle>
Write cycle time	tWC	55	–	3	90	3	120	2	100
Address enable time	tAW	50	–	2.5	75	2.5	100	1.5	75
Write pulse width	tWP	45	–	2	60	2	80	1	50
Input data setup time	tDW	30	–	2	60	2	80	1	50
Input data hold time	tDH	0	–	0.5	15	0.5	20	0.5	25

SRAM: 55ns, CPU: 33/25MHz, read cycle

BCLK

tRC

A[23:0]

tACC

#CEx

tACS

#RD

tOE tOHZ

RD data

D[15:0]

SRAM: 55ns, CPU: 33/25MHz, write cycle

BCLK

tWC

A[23:0]

tAW

#CEx

tWP

#WP

tDW tDH

D[15:0] WR data

A-102 EPSON S1C33210 PRODUCT PART