III PERIPHERAL BLOCK: SERIAL INTERFACE
RSRX0, RSTX0: Ch.0 IDMA request (D6, D7) /
RSRX1, RSTX1: Ch.1 IDMA request (D0, D1) / Serial I/F Ch.1, A/D IDMA request register (0x40293)
Specifies whether to invoke IDMA when an interrupt factor occurs.
When using the
Write "1": IDMA request
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA request
Write "0": Interrupt request
Read: Valid
The RSRXx and RSTXx bits are IDMA request bits corresponding to
For details on IDMA, refer to "IDMA (Intelligent DMA)". At initial reset, these bits are set to "0" (interrupt request).
DESRX0, DESTX0: Ch.0 IDMA enable (D6, D7) /
Enables IDMA transfer by means of an interrupt factor.
When using the
Write "1": IDMA enabled
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA enabled
Write "0": IDMA disabled
Read: Valid
The DESRXx and DESTXx bits are IDMA enable bits corresponding to
At initial reset, these bits are set to "0" (IDMA disabled).
SIO2ES0: SIO Ch.2 receive error/FP0 interrupt factor switching
(D0) /Interrupt factor FP function switching register (0x402C5)
Switches the interrupt factor.
Write "1": SIO Ch.2 receive error
Write "0": FP0 input
Read: Valid
Set to "1" to use the SIO Ch.2 receive error interrupt.
Set to "0" to use the FP0 input interrupt.
At
EPSON | S1C33210 FUNCTION PART |