V DMA BLOCK: HSDMA
Block transfer mode
The channel for which DxMOD in control information is set to "10" operates in block transfer mode. In this mode, a transfer operation invoked by one trigger is completed after transferring one block of data of the size set by BLKLENx. If a block transfer needs to be performed a number of times as set by the transfer counter, an equal number of triggers are required.
The operation of HSDMA in block transfer mode is shown by the flow chart in Figure 2.5.
START
Clear trigger flag HSx_TF
to accept next trigger
Data read from source (1 byte or 1 half word)
Data write to destination (1 byte or 1 half word)
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| ∗ : according to SxIN/DxIN | |
| Increments/decrements | |||
| address ∗ | settings | ||
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| Block size - 1 |
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N | Block |
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| size = 0 |
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| Y |
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| ∗ : according to SxIN/DxIN | |
| Restores initial values to | |||
| block size and address ∗ | settings | ||
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| Transfer counter - 1 |
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| Transfer | N | ||
| counter = 0 |
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| Y |
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| Clear HSDMA enable bit |
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| HSx_EN |
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| Set interrupt | factor flag |
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| FHDMx |
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END
Figure 2.5 Operation Flow in Block Transfer Mode
(1)When a trigger is accepted, the trigger flag HSx_TF is cleared and then data of the size set in the control information is read from the source address.
(2)The read data is written to the destination address.
(3)The address is incremented or decremented and BLKLENx is decremented.
(4)Steps (1) to (3) are repeated until BLKLEN reaches 0.
(5)If SxIN or DxIN is "10", the address is recycled to the initial value.
(6)The transfer counter is decremented.
(7)The HSDMA enable bit HSx_EN is cleared and HSDMA interrupt factor flag in ITC is set when the transfer counter reaches 0 (when DINTENx = "1").
S1C33210 FUNCTION PART | EPSON |