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| I OUTLINE: LIST OF PINS |
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| Table 3.4 | List of Pins for Clock Generator | ||
Pin name | I/O |
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OSC1 | I | – | ||||||
OSC2 | O | – |
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OSC3 | I | – | ||||||
OSC4 | O | – |
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PLLS[1:0] | I | – | PLL |
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| PLLS1 | PLLS0 | fin (fOSC3) | fout (fPSCIN) |
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| 1 | 1 |
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| 0 | 1 |
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| 0 | 0 | PLL is not used | L | ||
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PLLC | – | – | Capasitor connecting pin for PLL |
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| Table 3.5 List of Other Pins | |||
Pin name | I/O |
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| Function | ||
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TST | I | Pull- | Test mode input pin |
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| down | This pin is used for testing this chip. For further details, refer to the S1C33 ASIC Design Guide. | |||||
DSIO | I/O | Serial I/O pin for debugging |
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| This pin is used to communicate with the debugging tool S5U1C33000H. | |||||
#X2SPD | I | – | Clock doubling mode | |||||
#NMI | I | NMI request input pin |
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#RESET | I | Initial reset input pin |
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Note: "#" in the pin names indicates that the signal is low active.
S1C33210 FUNCTION PART | EPSON |