
III PERIPHERAL BLOCK:
I/O Memory of Clock Generator
Table 6.3 lists the control bits of clock generator.
Table 6.3 Control Bits of Clock Generator
Register name | Address | Bit | Name | Function |
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| Setting | Init. | R/W | Remarks | |||
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Power control | 0040180 | D7 | CLKDT1 | System clock division ratio |
| CLKDT[1:0] |
| Division ratio | 0 | R/W |
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register | (B) | D6 | CLKDT0 | selection |
| 1 |
| 1 |
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| 1/8 | 0 |
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| 1 |
| 0 |
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| 1/4 |
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| 0 |
| 1 |
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| 1/2 |
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| 0 |
| 0 |
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| 1/1 |
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| D5 | PSCON | Prescaler On/Off control | 1 |
| On |
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| 0 | Off | 1 | R/W |
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| – | reserved |
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| – |
| 0 | – | Writing 1 not allowed. | ||
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| D2 | CLKCHG | CPU operating clock switch | 1 |
| OSC3 |
| 0 | OSC1 | 1 | R/W |
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| D1 | SOSC3 | 1 |
| On |
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| 0 | Off | 1 | R/W |
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| D0 | SOSC1 | 1 |
| On |
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| 0 | Off | 1 | R/W |
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Clock option | 0040190 | – | – |
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| – |
| – | – | 0 when being read. | ||
register | (B) | D3 | HLT2OP | HALT clock option |
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| On |
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| 0 | Off | 0 | R/W |
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| D2 | 8T1ON |
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| Off |
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| 0 | On | 1 | R/W |
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| D1 | – | reserved |
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| – |
| 0 | – | Do not write 1. | |
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| D0 | PF1ON | OSC1 external output control |
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| On |
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| 0 | Off | 0 | R/W |
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Power control | 004019E | D7 | CLGP7 | Power control register protect flag | Writing 10010110 (0x96) | 0 | R/W |
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protect register | (B) | D6 | CLGP6 |
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| removes the write protection of | 0 |
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| D5 | CLGP5 |
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| the power control register | 0 |
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| D4 | CLGP4 |
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| (0x40180) and the clock option | 0 |
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| D3 | CLGP3 |
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| register (0x40190). |
| 0 |
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| D2 | CLGP2 |
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| Writing another value set the | 0 |
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| D1 | CLGP1 |
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| write protection. |
| 0 |
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| D0 | CLGP0 |
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| 0 |
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P1 function | 00402D4 | D7 | – | reserved |
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| – |
| – | – | 0 when being read. | |
select register | (B) | D6 | CFP16 | P16 function selection 1 | 1 |
| EXCL5 |
| 0 | P16 | 0 | R/W |
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| #DMAEND1 |
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| D5 | CFP15 | P15 function selection 1 | 1 |
| EXCL4 |
| 0 | P15 | 0 | R/W |
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| #DMAEND0 |
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| D4 | CFP14 | P14 function selection | 1 |
| FOSC1 |
| 0 | P14 | 0 | R/W | Extended functions | ||
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| (0x402DF) |
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| D3 | CFP13 | P13 function selection | 1 |
| EXCL3 |
| 0 | P13 | 0 | R/W |
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| T8UF3 |
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| D2 | CFP12 | P12 function selection | 1 |
| EXCL2 |
| 0 | P12 | 0 | R/W |
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| T8UF2 |
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| D1 | CFP11 | P11 function selection | 1 |
| EXCL1 |
| 0 | P11 | 0 | R/W |
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| T8UF1 |
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| D0 | CFP10 | P10 function selection | 1 |
| EXCL0 |
| 0 | P10 | 0 | R/W |
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| T8UF0 |
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Port function | 00402DF | – | reserved | 1 |
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| – |
| – | – | Undefined when read. | ||
extension | (B) | D5 | CFEX5 | P05 port extended function | 1 |
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| – |
| 0 | P05, etc. | 0 | R/W | Always set to 0. |
register |
| D4 | CFEX4 | P04 port extended function | 1 |
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| – |
| 0 | P04, etc. | 0 | R/W | Always set to 0. |
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| D3 | CFEX3 | P31 port extended function | 1 |
| #GARD |
| 0 | P31, etc. | 0 | R/W |
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| D2 | CFEX2 | P21 port extended function | 1 |
| #GAAS |
| 0 | P21, etc. | 0 | R/W |
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| D1 | CFEX1 | P10, P11, P13 port extended | 1 |
| DST0 |
| 0 | P10, etc. | 1 | R/W |
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| function |
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| DST1 |
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| P11, etc. |
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| DPC0 |
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| P13, etc. |
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| D0 | CFEX0 | P12, P14 port extended function | 1 |
| DST2 |
| 0 | P12, etc. | 1 | R/W |
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| DCLK |
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| P14, etc. |
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S1C33210 FUNCTION PART | EPSON |