II CORE BLOCK: BCU (Bus Control Unit)

A18IO: Areas 18–17 internal/external access selection (DF) / Access control register (0x48132)

A16IO: Areas 16–15 internal/external access selection (DE) / Access control register (0x48132)

A14IO: Areas 14–13 internal/external access selection (DD) / Access control register (0x48132)

A12IO: Areas 12–11 internal/external access selection (DC) / Access control register (0x48132)

A8IO: Areas 8–7 internal/external access selection (DA) / Access control register (0x48132)

A6IO: Area 6 internal/external access selection (D9) / Access control register (0x48132)

A5IO: Areas 5–4 internal/external access selection (D8) / Access control register (0x48132)

Select either internal access or external access for each area.

Write "1": Internal access

Write "0": External access

Read: Valid

When AxxIO is set to "1", the internal device that mapped to the corresponding area is accessed. When AxxIO is set to "0", the external device is accessed.

At cold start, these bits are set to "0" (external access). At hot start, these bits retain their status before being initialized.

A18EC: Areas 18–17 little/big endian method selection (D7) / Access control register (0x48132)

A16EC: Areas 16–15 little/big endian method selection (D6) / Access control register (0x48132)

A14EC: Areas 14–13 little/big endian method selection (D5) / Access control register (0x48132)

A12EC: Areas 12–11 little/big endian method selection (D4) / Access control register (0x48132)

A10EC: Areas 10–9 little/big endian method selection (D3) / Access control register (0x48132)

A8EC: Areas 8–7 little/big endian method selection (D2) / Access control register (0x48132)

A6EC: Area 6 little/big endian method selection (D1) / Access control register (0x48132)

A5EC: Areas 5–4 little/big endian method selection (D0) / Access control register (0x48132)

Select either little endian or big-endian method for accessing each area.

Write "1": Big-endian

Write "0": Little-endian

Read: Valid

When AxxEC is set to "1", the corresponding area is accessed in big-endian method. When AxxEC is set to "0", the area is accessed in little-endian method. When using area 10 as the boot area, fix A10EC at "0" (little-endian).

At cold start, these bits are set to "0" (little-endian). At hot start, these bits retain their status before being initialized.

A18AS: Areas 18–17 address strobe signal (DF) / G/A read signal control register (0x48138)

A16AS: Areas 16–15 address strobe signal (DE) / G/A read signal control register (0x48138)

A14AS: Areas 14–13 address strobe signal (DD) / G/A read signal control register (0x48138)

A12AS: Areas 12–11 address strobe signal (DC) / G/A read signal control register (0x48138)

A8AS: Areas 8–7 address strobe signal (DA) / G/A read signal control register (0x48138)

A6AS: Area 6 address strobe signal (D9) / G/A read signal control register (0x48138)

A5AS: Areas 5–4 address strobe signal (D8) / G/A read signal control register (0x48138)

Enable/disable the exclusive address strobe signal output.

Write "1": Enabled

Write "0": Disabled

Read: Valid

If AxxAS is set to "1", the exclusive address strobe signal is output from #GAAS (P21) pin when the corresponding area is accessed. If AxxAS is set to "0", the signal output is disabled.

At cold start, these bits are set to "0" (disabled). At hot start, these bits retain their status before being initialized.

B-II-4-44

EPSON

S1C33210 FUNCTION PART