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| TABLE OF CONTENTS |
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| S1C33210 FUNCTION PART |
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| Table of Contents |
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I | OUTLINE |
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| INTRODUCTION ............................................................................................... | ||
| BLOCK DIAGRAM ............................................................................................ | ||
| LIST OF PINS ................................................................................................... | ||
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| List of External I/O Pins..................................................................................................................................... | |
II | CORE BLOCK |
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INTRODUCTION .............................................................................................. | |||
CPU AND OPERATING MODE ......................................................................... | |||
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| CPU ......................................................................................................................................................................... | |
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| Standby Mode ..................................................................................................................................................... | |
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| HALT Mode............................................................................................................................................ | |
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| SLEEP Mode......................................................................................................................................... | |
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| Notes on Standby Mode ................................................................................................................... | |
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| Test Mode ............................................................................................................................................................. | |
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| Debug Mode......................................................................................................................................................... | |
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| Trap Table............................................................................................................................................................. | |
INITIAL RESET................................................................................................ | |||
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| Pins for Initial Reset........................................................................................................................................... | |
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| Cold Start and Hot Start .................................................................................................................................. | |
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| Reset Pulse .......................................................................................................................................................... | |
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| Boot Address........................................................................................................................................................ | |
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| Notes Related to Initial Reset ........................................................................................................................ | |
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| Pin Assignment for External System Interface....................................................................................... | |
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| I/O Pin List.............................................................................................................................................. | |
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| Combination of System Bus Control Signals ............................................................................ | |
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| Memory Area........................................................................................................................................................ | |
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| Memory Map.......................................................................................................................................... | |
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| External Memory Map and Chip Enable..................................................................................... | |
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| Using Internal Memory on External Memory Area.................................................................. | |
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| Exclusive Signals for Areas ............................................................................................................. | |
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| Area 10 .................................................................................................................................................... | |
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| Area 3 ...................................................................................................................................................... | |
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| Setting External Bus Conditions................................................................................................................... | |
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| Setting Device Type and Size ........................................................................................................ | |
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| Setting SRAM Timing Conditions................................................................................................. | |
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| Setting Timing Conditions of Burst ROM .................................................................................. | |
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| Bus Operation.................................................................................................................................................... | |
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| Data Arrangement in Memory....................................................................................................... | |
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| Bus Operation of External Memory............................................................................................. | |
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| Bus Clock............................................................................................................................................................. | |
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EPSON | iii |