8 ELECTRICAL CHARACTERISTICS
DRAM random access cycle (basic cycle)
| Data transfer #1 |
| Next data transfer | |
RAS1 | CAS1 | PRE1(precharge) | RAS1' | CAS1' |
BCLK |
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tAD | tAD | tAD |
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A[23:0] |
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| tRASD1 | tRASD2 |
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| tRASW |
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#RAS |
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| tCASD1 | tCASD2 |
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#HCAS/ |
| tCASW |
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#LCAS |
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| tRDD1 | tRDD3 |
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| tRDW2 |
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#RD |
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| tRACF | tCACF |
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| tACCF | ∗ 1 |
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| tRDS |
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| tRDH |
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D[15:0] |
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| tWRD1 | tWRD3 |
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| tWRW2 |
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#WE |
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| tWDD1 | tWDD2 |
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D[15:0] |
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∗1 tRDH is measured with respect to the first signal change (negation) of either the #RD or the A[23:0] signals.
DRAM
| Data transfer #1 | Data transfer #2 |
| Next data transfer | |
RAS1 | CAS1 | CAS2 | PRE1(precharge) | RAS1' | |
BCLK |
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tAD | tAD | tAD |
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A[23:0] |
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| tRASD1 |
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| tRASD2 |
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| tRASW |
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#RAS |
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| tCASD1 | tCASD2 |
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#HCAS/ | tCASW |
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#LCAS |
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| tRDD1 |
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| tRDD3 |
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| tRDW2 |
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#RD |
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| tCACF | tACCF |
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| tRACF |
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| tACCF | ∗ 1 |
| ∗ 1 |
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| tRDS | tRDS |
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| tRDH | tRDH |
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D[15:0] |
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| tWRD1 |
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| tWRD3 |
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| tWRW2 |
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#WE |
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| tWDD1 | tWDD2 |
| tWDD2 |
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D[15:0] |
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∗ 1 tRDH is measured with respect to the first signal change (negation) of either the #RD or the A[23:0] signals.
S1C33210 PRODUCT PART | EPSON |