
III PERIPHERAL BLOCK: SERIAL INTERFACE
Setting Asynchronous Interface
When performing asynchronous transfer via the serial interface, the following must be done before data transfer can be started:
1.Setting input/output pins
2.Setting the interface mode
3.Setting the transfer mode
4.Setting the input clock
5.Setting the data format
6.Setting interrupt/IDMA/HSDMA
The following describes how to set each of the above. For details on interrupt/DMA settings, refer to "Serial Interface Interrupts and DMA".
Note: Always make sure the serial interface is inactive (TXENx and RXENx = "0") before making these settings. A change in settings during operation may result in a malfunction.
Setting input/output pins
In the asynchronous mode, two
Set CFP0[7:0] (D[7:0]) / P0 function select register (0x402D0) according to the pins used. (Both channels can be used, if necessary.) Since the #SRDYx pin is not used, P03 or P24 can be used as an I/O port. During operation using the internal clock, P02 or P25 can also be used as an I/O port.
Setting the interface mode
IRMDx[1:0] (D[1:0]) / Serial I/F IrDA register (Ch.0: 0x401E4, Ch.1: 0x401E9, Ch.2: 0x401F4, Ch.3: 0x401F9) is used to set the IrDA interface. Since IRMDx[1:0] becomes indeterminate at initial reset, initialize it by writing "00" when using the serial interface as a normal interface, or "10" when using the serial interface as an IrDA interface. This setting must be made before a transfer mode is set.
Setting the transfer mode
Use SMDx to set the transfer mode of the serial interface as described earlier.When using the serial interface in the
Setting the input clock
In the asynchronous mode, the operating clock can be selected between the internal clock and an external clock. Ch.0 input clock selection: SSCK0 (D2) / Serial I/F Ch.0 control register (0x401E3)
Ch.1 input clock selection: SSCK1 (D2) / Serial I/F Ch.1 control register (0x401E8)
Ch.2 input clock selection: SSCK2 (D2) / Serial I/F Ch.2 control register (0x401F3)
Ch.3 input clock selection: SSCK3 (D2) / Serial I/F Ch.3 control register (0x401F8)
The external clock is selected (input from the #SCLKx pin) by writing "1" to SSCKx, and an internal clock is selected by writing "0".
Note: SSCKx becomes indeterminate at initial reset, so be sure to reset it in the software.
SSCK11 and SSCK31 must be "0" because Ch. 1 and Ch. 3 support only asynchronous operation.
•Internal clock
When the internal clock is selected, the serial interface is clocked by a clock generated using an
Ch.0: Clock output by
Ch.1: Clock output by
Ch.2: Clock output by
Ch.3: Clock output by
Therefore, before the internal clock can be used, the following conditions must be met:
1.The prescaler is outputting a clock to the
2.The
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