II CORE BLOCK: INTRODUCTION

II-1 INTRODUCTION

The core block consists of a functional block C33_CORE including CPU, BCU (Bus Control Unit),ITC (Interrupt Controller), CLG (Clock Generator) and DBG (Debug Unit), an I/O pad block for external interface, and an SBUS (Internal Silicon Integration Bus) for interfacing with on-chip Peripheral Macro Cells.

C33 DMA Block

C33 Internal Memory Block

C33_DMA

(IDMA, HSDMA)

Internal RAM

(Area 0)

C33_CORE

PADCORE

 

 

Pads

 

 

 

(CPU, BCU, ITC, CLG, DBG)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C33_SBUS

C33 Core Block

C33_ADC

(A/D converter)

C33 Analog Block

C33_PERI

PADPERI

 

 

Pads

 

 

 

(Prescaler, 8-bit timer, 16-bit timer,

 

 

 

 

 

 

 

 

 

 

Clock timer, Serial interface,

 

 

 

 

Mobile access interface, Ports)

 

 

 

 

 

 

 

 

 

C33 Peripheral Block

Figure 1.1 Core Block

 

 

 

 

S1C33210 FUNCTION PART

EPSON

B-II-1-1