III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERS

PTOUT0: Timer 0 clock output control register (D2) / 8-bit timer 0 control register (0x40160)

PTOUT1: Timer 1 clock output control register (D2) / 8-bit timer 1 control register (0x40164)

PTOUT2: Timer 2 clock output control register (D2) / 8-bit timer 2 control register (0x40168)

PTOUT3: Timer 3 clock output control register (D2) / 8-bit timer 3 control register (0x4016C)

PTOUT4: Timer 4 clock output control register (D2) / 8-bit timer 4 control register (0x40174)

PTOUT5: Timer 5 clock output control register (D2) / 8-bit timer 5 control register (0x40178)

Controls the clock output of each timer.

Write "1": On

Write "0": Off

Read: Valid

The underflow signal of timer x is output from the external output pin set by CFP1x by writing "1" to PTOUTx. When using timer 2 or 3 as the clock source of the serial interface, a clock generated from the underflow signal by dividing it by 2 is output to the corresponding channel of the serial interface.

The clock output is turned off by writing "0" to PTOUT, and the external output is fixed at "0" and the internal clock output is fixed at "1".

At initial reset, PTOUT is set to "0" (off).

P8TM2–P8TM0:8-bit timer interrupt level (D[2:0]) / 8-bit timer, serial I/F Ch.0 interrupt priority register (0x40269)

Set the priority level of the 8-bit programmable timer interrupt in the range of 0 to 7.

At initial reset, the content of the P8TM register becomes indeterminate.

E8TU0: Timer 0 interrupt enable (D0) / 8-bit timer interrupt enable register (0x40275)

E8TU1: Timer 1 interrupt enable (D1) / 8-bit timer interrupt enable register (0x40275)

E8TU2: Timer 2 interrupt enable (D2) / 8-bit timer interrupt enable register (0x40275)

E8TU3: Timer 3 interrupt enable (D3) / 8-bit timer interrupt enable register (0x40275)

Enables or disables generation of an interrupt to the CPU.

Write "1": Interrupt enabled

Write "0": Interrupt disabled

Read: Valid

E8TUx is the interrupt enable bit which controls the interrupt generated by each timer. The interrupt set to "1" by this bit is enabled, and the interrupt set to "0" by this bit is disabled.

At initial reset, E8TUx is set to "0" (interrupt disabled).

F8TU0: Timer 0 interrupt factor flag (D0) / 8-bit timer interrupt factor flag register (0x40285)

F8TU1: Timer 1 interrupt factor flag (D1) / 8-bit timer interrupt factor flag register (0x40285)

F8TU2: Timer 2 interrupt factor flag (D2) / 8-bit timer interrupt factor flag register (0x40285)

F8TU3: Timer 3 interrupt factor flag (D3) / 8-bit timer interrupt factor flag register (0x40285)

Indicates the interrupt generation status of the 8-bit programmable timer.

When read

Read "1": Interrupt factor has occurred

Read "0": No interrupt factor has occurred

When written using the reset-only method (default)

Write "1": Interrupt factor flag is reset

Write "0": Invalid

When written using the read/write method

Write "1": Interrupt flag is set

Write "0": Interrupt flag is reset

S1C33210 FUNCTION PART

EPSON

B-III-3-15