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Intel 210200-002 manual

Models: 210200-002

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IAPX 88/10 Characteristics Block Translate Flowchart +- Reset Assembly Language PROGRAMMING1 Call Call Procedure Call Ascii Adjust for Division Powerful String Processing Enable Flag Load Pointer Using ES LES Minimum/Maximum Mode

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Intel 210200-002 manual

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Contents

IAPX Inter Intel Corporation About this Book Page Table of Contents List of Figures List of Figures IAPX 88 VS. Zilog Z8D Introduction To Page Chapter Introduction Execution ~STRUCTION BUS Bus Interface and Execution Units Work in Parallel ~~~11~~ks Control Registers Cal address Fig Result is always 20-bits ofphysical address 13. Process Relocation Displacement = 12 Wage Code Index Instruction SET Powerful String Processing Conditional Transfers Interfacing the 8088 is Easy Flexible Using Special Multiplexed Bus Parts \2~~~~\~~j-1L8~0~88~ To,ITovide extra drive capability for the data IAPX 88 Performance is Cost Effective Processor Introduction Review IAPX 188 CPU Interrupt Controller IAPX 188 CPU CPU Internal Registers IAPX 88 Architecture Instructions Page Chapter Architecture and Instructions Data Registers Pointer and Index Registers Flag Register File Addressing Modes ==~TA~~=J Direct Addressing Fffffh ·--- 16 BITs----I.~1 Organization of the Instruction SET Accumulator-Specific Transfers Addition Logic Instructions Five primitive string oper~tions are provided Body of this loop requires seven bytes of code NMI Instruction Timings Assembly Language PROGRAMMING1 ~g~~CE TRANSLATOR~g~bEECT Inanqout Segment MY Data Segment Summary Inandout Segment Equal DB ? INC CX increment CX AL,PORTVAL OUT Portval and OFEH,AL Assembler will assemble Some examples are Thing Allzero DB 6 DUP Dontcare DB ?,?,?,?,?,?,?,?Then we could name first the byte in the word as follows Segment Ends Assume Mydata Segment Ends Myextra Alpha Beta Gamma Mystack BL,X Assume Dsnothing Cycle INC OLD~BYTE Near and Far Retstart Cycle NIL INC AX MOV AX,BX SI Cmps BETA,ALPHA Scas Alpha Lods Alpha Stos Beta Add two unpacked BCD Ascii strings together Move 50 bytes between two overlapping strings 14. ASM-86 Reserved Words 14. ASM 86 Reserved Words Used Explanation References For Instruction SETIdentifier Explanation REF Referencesref For Instruction SETMod Field Bit Assignments REF References REF For Instruction SETPage Operation Flags Affected AAA Ascii Adjust AAA For AdditionDescription Ascii Adjust for DivisionAAM Ascii Adjust AAM for Multiply1001111111 AAS Ascii Adjust AAS For SubtractionADC destination, source ADC ADD with Carry ADCADC ADD with Carry ADC ADD destination,source AdditionaddADDCX, OX Destination,source LogicalBETA, 01H LogicalCall procedure-name Call Call Procedure CallCall Call Procedure Call 1100110001 CBW Convert Byte CBW Toword1111110001 CLC Clear Carry1111111001 FlagEnable Flag 1111101011 Complement Carry FlagCMP destination, source ComparecmpImmediate Operand with Accumulator CMP CompareRep Cmps Compare String Cmps Byte or Word11010011wl EM PS destination-string, source-stringCWD Convert Word CWD To Doubleword DAA Decimal Adjust DAA For Addition 1001011111 DAS Decimal Adjust DAS For SubtractionDEC Dividediv DIVDIV ESC 20,AL Escape11110100 HalthltInteger Divide Idiv IdivInteger Divide Integer Multiply Imul ImulAccumulator,port Input Byte or WordINC destination IncrementincINT interrupt-type InterruptEncoding INT Interruptint1110011101 1110011111 Iret Interrupt Return IretJump on Above Jumponnotbelow Or Equal JNB Disp Jump on below Jump on not Above or EqualJNA Jump on Carry Jcxz short-label JcxzJump on Zero Jump on EqualJump on Greater JnleJGE Jump on Greater or Equal JNL Jump on not Less JGE JNLJump on Less Jumponnot Greater or Equal JNG Jump on not Greater JLEJMP target JMP Jump Unconditionally JMPMP Jump Unconditionally JMP JNC Jump on not Carry JNC JNE Jump on not Equal JNZ Jump on not Zero JNE JNZJump on not Overflow Jump on not Sign JNP Jump on not Parity JPO Jump on Parity ODD JNP JPOJump on Overflow JO JPE Jump on Sign Lahf Load Register AH Lahf From Flags LOS destination,source 111 0001 01 1mod reg rImLEA destination,source Load Effective AddressLES destination, source Load Pointer Using ES LESLock Lock the BUS Lock Lods source-string Lods Load String Lods Byte or Word11010110wl Loop short-label Loop LooploopLOOPE/LOOPZ short-label Loopwhile Equal ZeroLOOPNE/LOOPNZ short-label Loopwhile0 1 1 w reg I· data MOV Movebyteorword MOV110001 0 d w 1mod reg rim 11100011 w 1 mod 000 rim 1 data11 00011 00 Imod 0 reg r I ml MOV Move Byte or Word MOV11000111 0 Imod 0 reg r/ml Movs destination-string, source-string Movs Move String Movs11010010wl MUL source MultiplymulNEG destination Negateneg11111 011 w 1mod a11 rIm 1100100001 No OperationNot destination Logical not not11111 01 1 w 1mod 0 1 0 rim Or destination,source Logical orOr AL, BL 1014 Outputout1111 00 11 w 1 port 11110111wlPOP destination PoppopPOP POP All POP Flags PopfPush Pushpush 10 0 0 reg 1 1 0 Pushpush111111111 1mod 11 0 rIm 01 01 0 regPushf RCL destination, count RCL Rotate Through RCL Carry LeftRCL Rotate Through RCL RCR destination, count Carry RightRepeat While not Equal Repeat While not Zero Repeat While Equal Repeat While ZeroRepeat While not Equal Repeat While not Zero Repeat While Equal Repeat While Zero1111001Z Repeat While not Equal Repeatwhile not ZeroRET optional-pap-value Returnret1110010111 111000011111 1 00001 0 1 data-low ROL destination, count ROL Rotate Left ROLROR destination, count Rotate Right ROR1100111101 Sahf Store Register AH Sahf Into FlagsCF, OF, PF, SF, ZF SAL Shift Arithmetic Left SHL Shift Logical LeftShift Arithmetic Left Shift Logical Left SAL SHLCF, OF, PF, SF, ZF SAR Shift Arithmetic SAR RightSAR Operands Clocks Transfers Bytes SAR Coding Example See destination,source Subtract with BorrowSBB + 1519/rep Scas Scan Byte or Scas Word String11010111wl SeAS destination-stringSHR destination, source SHR Shift Logical Right SHRIf v = 0 then Count = 1 else Count = CL 111 01 00 v w 1mod 1 01 rIm1111110011 SET Carry1111111011 STD SET Direction Flag STDSET INTERRUPT· Enable Flag Stos destination-string Stos Store BYTE/OR/ Stos Word String11010101wl SUB destination,source SubtractsubSUB Subtractsub Test destination,source Testtest11 0 1 0 1 0 0 w 1 data 1100001 0 w 1mod reg rIm11111 011 w 1 mod 000 rIm 1 data 1100110111 WaitwaitXchg destination, source Exchange Xchg001 0 reg 11000011 w 1mod reg rImXlat translate-table 11010111XOR destination,source Exclusive or XORXORCX, BX Page IAPX Hardware Design Page Hardware Design Hardware Design Timing ~11 ttttt +- Reset Bus Timing and Minimum Mode Status \L- -----tl Bus Interface Memory and Peripheral Interface ROl ~Atui Hold 101M 8284A FFFFOH· Inputs VIH of 2.6 volts DV Ie dT = C Ready Output ElKRDYINPUT~~ 8284A External Interrupts 3FFH Internal Interrupts SINGLE-STEP Execution Bus Control Transfer ~E~ ~ ClK Osa 31. Minimum/Maximum ModePulse PULS.E..2 KJC Page Application4 Examples Page Chapter Application Examples RESfrF 0J 110~ Address Line Usage Recommended Device Addressing ~RESET ~~~--~~3-= ~~~~~~~~~~~~5~AD1g ~ ~ NC Rr? -= Data character or a controlIstatus char- acter Ururururu Ttj ~rt~27 IAPX 88-BASED $100 BUS System Language 8088 IAPX 88 Multiprocessor Interface Cfi ~ ~I~ Application Examples ~o,es ···l-T...-lfl ~--i Page Supplement Page Microcomputer Overview Supplement Machine Cycles Whatsinside the CPU? Addressing modes Page AppendixA Benchmark Report Intel iAPX 88 vs Zilog Z80 Processor Description Appendix Performance Measurements Block Move Interrupt Response I2.6 Z80/iAPX Memory Utilization Bytes iAPX 88 vs Z80 Bytes of Code Conclusion Page Appendix Benchmark Program Code and Flowcharts Usage LPI HL,O Block Translate Flowchart Ebcbuf DE ,EBCBUF Bubble Sort Accumulator Zao Benchmark Report Intel iAPX 88 vs Motorola MC6809 Processor Description IAPX Program Descriptions Results MC6809 IAPX 88/10 Appendix Appendix Benchmark Program Code and Flowcharts P1,AX Addd Block Move Flowchart Register Usage Register Usage Character Search Flowchart OI,PTR Usage Accumulator Count Inter IAPX 88/10 Inter IAPX 88/10 Inter ~ Xxxxoh AFN-OOB26D TI IT Ill UP&=1? ~ External Interface Halt IAPX 88/10 External Synchronization via Test AFN-008260 Inter Absolute Maximum RATINGS· IAPX 88/10 IAPX 88/10 Characteristics ~--~~ IAPX 88/10 Waveforms IAPX 88/10 Characteristics ~Ii Inter 1L.~~ Instruction SET Summary Inter 8284A Clock Generator and Driver for iAPX 86, 88 Processors IntJ8284A +---H D 8284A Characteristics ~/~----------~t 8284A Vcc Inter Inter Absolute Maximum RATINGS· Inter8282/8283 \V\1 8286/8287 8286/8287 ~,,o Inter8286/8287 IntJ8286/8287 Domestic Sales Offices European Sales Offices International Sales Offices