Intel 210200-002 manual Conditional Transfers

INTRODUCTION

instruction within the current code segment for an intrasegment transfer, or to a different code segment with an intersegment transfer. The transfer is made unconditionally any time the instruction is executed. An intra- segment transfer is always made relative to the current value of the instruction pointer. Program segments which only use intraseg- ment transfers are, therefore, relocatable in memory. The conditional transfer instruc- tions mayor may not transfer control, depending on the state of the CPU flags at the time the instruction is executed.

The 18 instructions (Fig. 1-20), each test a different combination of flags for a condi- tion. If the condition is true, control is transferred to the target address specified for the instruction. If the condition is false, then control passes to the instruction that follows the conditional jump.

	CONDITIONAL TRANSFERS
JA/JNBE	Jump if above/ not below nor equal
JAE/JNB	Jump if above or equal/not below
JB/JNAE	Jump if below /not above nor equal
JBE/JNA	Jump if below or equal/not above
JC	Jump if carry
JE/JZ	Jump if equal/zero
JG/JNLE	Jump if greater/not less nor equal
JGE/JNL	Jump if greater or equal/not less
JLlJNGE	Jump if less/not greater nor equal
JLE/JNG	Jump if less or equal/not greater
JNC	Jump if not carry
JNE/JNZ	Jump if not equal/ not zero
JNO	Jump if not overflow
JNP/JPO	Jump if not parity/parity odd
JNS	Jump if not sign
JO	Jump if overflow
JP/JPE	Jump if parity/parity even
JS	Jump if sign

The iteration control instructions regulate the repetition of software loops. These instruc- tions use the CX register as a counter. The LOOPNE instruction for instance decre- ments a count, checks to see if the count is zero, and branches back to the beginning of the program loop. The equivalent function would require multiple instructions in an older 8-bit instruction set, such as the 8080's.

The interrupt instructions allow interrupt servic~ routines to be activated by both pro-

grams and external hardware devices. The effect of software initiated interrupts is sim- ilar to hardware initiated interrupts.

The processor control instructions (Fig. 1-21) allow programs to control various CPU func- tions to update flags and to synchronize the 8088 with external events. Finally, the NOP instruction causes the 8088 CPU to do nothing.

UNCONDITIONAL TRANSFERS
CALL	Call procedure
RET	Return from procedure
JMP	Jump
ITERATION CONTROLS
LOOP	Loop
LOOPE/ LOOPZ	Loop if equal/zero
LOOPNE/ LOOPNZ	Loop if not equal/not zero
JCXZ	Jump if register CX = 0
INTERRUPTS
INT	Interrupt
INTO	Interrupt if overflow
IRET	Interrupt return

NOTE:

"Above" and "below" refer to the relationship of two unsigned values. "Greater" and "less" refer to the relationship of two signed values.

Figure 1-20. Program Transfer Instructions

1-12