Intel 210200-002 manual Table of Contents

	Table of Contents
CHAPTER 1		Page
Introduction to iAPX 88/188
What is the 8088?		1-1
8088 Pipelined Architecture		1-2
Efficient Program Coding		1-3
iAPX 88 Megabyte Memory Addressing		1-5
The 8088's16-Bit Instruction Set		1-10
Interfacing the 8088		1-13
Processor Extensions		1-17
Review		1-19
The iAPX 188 CPU		1-20
CHAPTER 2
iAPX 88 Architecture and Instructions
iAPX 88 Architecture		2-1
Register Structure		2-2
Addressing Modes		2-5
Organization of Instruction Set		2-10
Assembly Language Programming		2-18
Instruction Set		2-45
CHAPTER 3
iAPX 88 Hardware Design
CPU Pin Fu nctions		3-1
8088 Bus Timing and Minimum Mode Status		3-6
Bus Interface		3-8
Memory and Peripheral Interface		3-9
Clock Generation		3-13
Reset		3-14
Ready Implementation and Timing		3-16
Interrupts		3-18
Bus Control Transfer		3-24
Maximum Mode Systems		3-24
CHAPTER 4
Application Examples
Multiplexed System		4-1
iAPX 88 Demultiplexed System		4-10
iAPX 88-Based S100 Bus System		4-14
iAPX 88-Based CRT Controller		4-14
iAPX 88 Multiprocessing Systems		4-16
SUPPLEMENT
What is a Microcomputer?	...................................................	S-1
What are Data, Address and Control Busses?		S-2
Machine Cycles, Interrupts, and Direct Memory Access		S-3
What'sInside the CPU?		S-4
APPENDIX
Benchmark Reports and Data Sheets
Benchmark Report: Intel®	iAPX 88 vs. Zilog Z80	1
Benchmark Report: Intel®	iAPX 88 vs. Motorola MC6809	20
iAPX 88/10 16-Bit HMOS Microprocessor		37
8284A Clock Generator and Driver for iAPX 88/10, iAPX 88/10 Processors		64
8282/8283 Octal Latch		72
8286/8287 Octal Bus Transceiver		77

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