Intel 210200-002 manual Sbb

SBB

SUBTRACT WITH

BORROW

SBB

Encoding:

Memory or Register Operand and Register Operand:

I 0001 1 0 d w I mod reg r / m I

if d = 1 then LSRC = REG, RSRC = EA, OEST = REG else LSRC = EA, RSRC = REG, OEST = EA

Immediate Operand from Memory or Register Operand:

11 00000 s w I modO 1 1 r / m I data Idata if s:w=011

LSRC = EA, RSRC = data, OEST = EA

Immediate Operand from Accumulator:

I 00011 1 0 w I data I data if w=1 I

if w = 0 then LSRC = AL, RSRC = data, OEST = AL else LSRC = AX, RSRC = data, OEST = AX

SBB Operands Clocks· Transfers Bytes SBB Coding Example

register, register	3	-	2	SBB BX, CX
register, memory	9(13) + EA	1	2-4	SBB 01, [BX].PAYMENT
memory, register	16(24) + EA	2	2-4	SBB BALANCE, AX
accumulator, immediate	4	-	2-3	SBB AX, 2
register, immediate	4	-	3-4	SBB CL, 1
memory, immediate	17(25) + EA	2	3-6	SBB COU NT [SI], 10

*b(w): where b denotes the number of clock cycles for byte operands and w denotes the number of clock cycles for word operands.

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