Intel 210200-002 manual Logical, BETA, 01H

AND

AND LOGICAL AND

Encoding:

Memory or Register Operand with Register Operand:

1001 000 d w 1mod reg rIm 1

if d = 1 then LSRC = REG, RSRC = EA, DEST = REG else LSRC = EA, RSRC = REG, DEST = EA

Immediate Operand to Memory or Register Operand:

11 000000 w 1mod 1 00 rIm 1 data data if w=1

LSRC = EA, RSRC = data, DEST = EA

Immediate Operand to Accumulator:

10 0 1 0 0 1 0 w 1 data 1 data if w=1 1

if w = 0 then LSRC = AL, RSRC = data, DEST = AL else LSRC = AX, RSRC = data, DEST = AX

AN D Operands	Clocks·	Transfers	Bytes	AND Coding Examples
register, register	3	-	2	AND AL, BL
register, memory	9(13) +EA	1	2-4	AND CX, FLAG_WORD
memory, register	16(24) +EA	2	2-4	AND ASCII [DI], AL
register, immediate	4	-	3-4	AND CX, OFOH
memory, immediate	17(25) +EA	2	3-6	AND BETA, 01H
accumulator, immediate	4	-	2-3	AND AX, 01010000B

*b(w): where b denotes the number of clock cycles for byte operands and w denotes the number of clock cycles for word operands.

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