Intel 210200-002 manual Ill

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iAPX 88/10

r	elK 'MNIIIX~Vc:c
	READY	I~'MM~	--------------------------------------------------------------------------						~
	RES~	~~--------------------------------			~r-------------	~----------	1-------	~	----~
	.... n.~------------------------				~4---------	~~~------	~-----		+~~
	CPUrnn,~________________________~______~~__________-i-+__~______4-______-+-+__~
		DTIII r------	,	r ---	:l
		DEIIt----	l1		I
		ALE	~STB		I

GNDII7 OE 8282

ADo-AD,LATCH

At - AllrCOR/DAr (1,20R3)

I

ADDRESS

INTA

D=~
L~~'~~~I~TA1~1~1:;:::=1~r~1~1~
F	,J.ll1251A	I 2142 RAM (2,WE ""'1I "16'2PROMill!!IICSPERIPHERALMCS.:"'" I
	V I~~~~~~~ f--
	INT	Vt--I
	L....--1~IRO-7

Figure 6. Demultiplexed Bus Configuration

11"lm		dREADY	So		So		AMWC I--N.C.
	D					j
	8284A		MNfM)!	OND		ClK	MRDe
	CLOCK		S,		So		MWTC
	GENERATOR	elK
I		RESET	S,		S,	8288	IORC
	ROY			~ DEN		C~~~R	lowe
GNO		8088		r --- DT/R			Alowe I--N.C
		CPU			ALE		INTA
					r --- :l
					ST.		I
							I
				GNO- I---	OE
						8282	I
		ADo-AD,
				~DORIDA~	LATCH		ADDRESS
			"a-An		(1,2DR31

W

'NT

(

p::

F

T 0-

821\,6

TRANSCEIVER	DA A	1 11				n
ill	1 11			I~.
~	2142 RAM (2)	I	2718·2 PROM			~"'"I
				ill! 1	.	MC5-ao
....A I-	WE ""I				PERIPHERAL
	I
V INTERRUPT 1-

CONTROL

!<i=='RO-'

' ----

Figure 7. Fully Buffered System Using Bus Controller

45 AFN.()OB2lID