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iAPX 88/10
8-BIT HMOS MICROPROCESSOR
8088/8088-2
•8·Bit Data Bus Interface
•16·Bit Internal Architecture
•Direct Addressing Capability to 1 Mbyte of Memory
•Direct Software Compatibility with iAPX 86110 (8086 CPU)
•14·Word by 16·Bit Register Set with Symmetrical Operations
•24 Operand Addressing Modes
•Byte, Word, and Block Operations
•8·Bit and 16·Bit Signed and Unsigned Arithmetic in Binary or Decimal, Including Multiply and Divide
•Compatible with 8155·2, 8755A·2 and 8185·2 Multiplexed Peripherals
•Two Clock Rates:
5 MHz for 8088
8 MHz for 8088·2
•Available in EXPRESS
-Standard Temperature Range
-Extended Temperature Range
The Intel® iAPX 88/10 isa new generation, high performance microprocessor implemented in
| MEMORY INTERFACE |
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| C·BUS |
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| MIN | IMAX 1 |
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| MODE | MODE |
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| Vee |
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| GND |
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| A14 |
| A15 |
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| INSTRUCTION | A13 |
| A16/S3 |
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| STREAM BYTE |
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| A17/54 |
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| ~UEUE | A12 |
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| An |
| A1B/S5 |
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| Al0 |
| A19/56 |
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BUS |
| CS |
| A9 |
| SSO | (HIGH) | |
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INTERFACE |
| S5 |
| AS |
| MN/MX |
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UNIT |
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| DS |
| AD7 |
| jjjj |
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| IP |
| AD6 |
| HOLD | (RO/Gf(j) | |
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| ADS |
| HLDA | (ROJGT1) | |
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| A·BUS | AD4 |
| Viii | (LOCK) | |
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| AD3 |
| 10/M | (82) | |
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| AD2 |
| DTiii | (s1) | |
| AH | AL |
| ADl |
| lIEN | (50) | |
| BH | BL |
| ADO |
| ALE | (OSO) | |
| CH | CL |
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| NMI |
| Tm'A | (OSl) | |||
EXECUTION | DH | DL |
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| INTR |
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UNIT |
| SP |
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| BP |
| ClK |
| READY |
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| SI |
| GND |
| RESET |
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| DI | FLAGS |
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| Figure 2. | iAPX 88/10 Pin Configuration | ||||
Figure 1. iAPX 88/10 CPU Functional Block Diagram |
Intel Corporation Assumes No Responsibilty for the Use of Any Circuitry Other Than Circuitry Embodied in an Intel Product. No Other Circuit Patent Licenses a'feImplied.
© INTEL CORPORATION. 1980
37 | AFN·OOB26D |