Intel 210200-002 manual Addcx, Ox

ADD

ADDITIONADD

Encoding:

Memory or Register Operand with Register Operand:

IOOOOOOdw 1mod reg rIm 1

if d = 1 then LSRC = REG, RSRC = EA, DEST = REG else LSRC = EA, RSRC = REG, DEST = EA

Immediate Operand to Memory or Register Operand:

1100000 s w 1mod 000 rIm 1 data Idata if s:w=011

LSRC = EA, RSRC = data, DEST = EA

Immediate Operand to Accumulator:

I0 0 0 0 0 1 0 w I data I data if w=1 I

if w = 0 then LSRC = AL, RSRC = data, DEST = AL else LSRC = AX, RSRC = data, DEST = AX

ADD Operands	Clocks*	Transfers	Bytes	ADD Coding Examples
register,register	3	-	2	ADDCX, OX
register, memory	9(13) + EA	1	2-4	ADD 01, [BX].ALPHA
memory, register	16(24) + EA	2	2-4	ADD TEMP, CL
register, immediate	4	-	3-4	ADD Cl, 2
memory, immediate	17(25) + EA	2	3-6	ADD ALPHA, 2
accumulator, immediate	4	-	2-3	ADD AX, 200

*b(w): where b denotes the number of clock cycles for byte operands and w denotes the number of clock cycles for word operands.

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