Intel mcs-48 manual PIN Configuration Block Diagram, PIN Names

Models: mcs-48

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8185/8185-2

1024 x 8-BIT STATIC RAM FOR MCS_85™

• Multiplexed Address and Data Bus

Low Standby Power Dissipation

Directly Compatible with 8085A

Single +5V Supply

 

and 8088 Microprocessors

 

 

 

Low Operating Power Dissipation

High Density 18-Pin Package

The Intel'"8185 is an 8192-bit static random access memory (RAM) organized as 1024 words by 8-bits using N-channel Silicon-Gate MOS technology. The multiplexed address and data bus allows the 8185 to interface directly to the 8085A and 8088 microprocessors to provide a maximum level of system integration.

The low standby power dissipation minimizes system power requirements when the 8185 is disabled.

The 8185·2is a high-speed selected version of the 8185 that is compatible with the 5 MHz 8085A-2 and the full speed 5 MHz 8088.

PIN CONFIGURATION

 

BLOCK DIAGRAM

 

ADo

 

Vee

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AD,

 

RD

 

.

 

 

AD,

 

WR

cs

 

 

AD,

 

ALE

 

 

AD,

 

CS

CE,

 

 

 

 

CE,

 

R!W

 

 

 

 

 

 

AD5

 

CE,

RO

 

LOGIC

 

AD,

 

CE,

W-

 

 

 

 

 

A,

ALE

 

 

 

AD,

 

 

 

I

 

Vss

 

As

 

 

 

 

 

 

 

~

1K x 8

 

 

 

 

DATA

RAM

---vBUSMEM0RY BUFFER

ARRAY

X-V DECODE

 

PIN NAMES

 

ADO·AD7

ADDRESS/DATA LINES

 

As. A9

ADDRESS LINES

 

CS

CHIP SELECT

Aa. Ag

CE,

CHIP ENABLE (101M)

ALE

CE,

CHIP ENABLE

 

ALE

ADDRESS LATCH ENABLE

 

RO

READ ENABLE

 

WJj

WRITE ENABLE

 

~v:' ADDRESS U ;:..

LATCH

6-96

AFN-Q0201A-01

Page 239
Image 239
Intel mcs-48 manual PIN Configuration Block Diagram, PIN Names