Intel mcs-48 manual All Write Registers, DontCare

8291

8291 Registers

Abit-by-bit map of the 16 registers on the 8291 is presented in Table 3. A more detailed explanation of each of these registers and their functions follows. The access

of these registers by the microprocessor is accomplished by using the es. RD, WR, and RSo-RS2 pins.

Register

CS RD WR RSo-RS2

All Read Registers

0

0

eee

All Write Registers

o

x

o

eee

Don'tCare

X

XXX

TABLE 3. 8291 REGISTERS

READ REGISTERS

REGISTER SELECT

WRITE REGISTERS

CODE

RS2

RSl

RSO

I

017

I

016

015

014

013

012

Oil!

010

o

!

007

! 006

o05! 004

003

I 002

001

I 000

DATA IN

DATA OUT

I

CPT

I

APT

GET I

END

I

DEC!

ERR!

80

!

81

1

I

CPT

! APT

!

GET I ENO I DEC I ERR

80

I 81

INTERRUPT STATUS 1

INTERRUPT ENABLE 1

INT

!

SPAS!

LLO!

REM!

SPASC!LLOC I REMC! Aosci

o

I 0

I 0

oMAOloMAl1

SPAScl LLOC!

REMC! AoSC I

INTERRUPT STATUS 2

INTERRUPT ENABLE 2

I

S8

SROS I

56

IS5

I

54 !

53

S2

! 51

1

I

58

[rsv

56

!S5

I S4

IS3

S2

JSYJ

SERIAL POLL STATUS

SERIAL POLL MODE

1

ton

I

Ion

EOI

I

LPAS I

TPAS I LA

TA

I

MJMNI

o

I

TO

I

LO

I

0

I 0

I

0

I 0

AOMll AoMOI

ADDRESS STATUS

ADDRESS MODE

[CPT71

CPT61

CPTS!

CPT41

CPT3! CPT21

cpnl

CPTO I

1

I

CNT2l

CNTll

CNTOI COM41

COM31 COM21

COMll COMol

COMMAND PASS THROUGH

AUX MODE

oTO

oLO

I

A05.01

A04.0! A03.0!

A02.01 AOl.01

o

I ARS

IoT

oL

I AD5

I

A04

I A03

A02

I Aol

ADDRESS 0

ADDRESS 0/1

I x

1

I

Ee7

!

EC6

EC5

I Ee4

I

Ee3

I Ee2

Eel

I ECO

ADDRESS 1

EOS

Data Registers

017 ! 016 016 I 014 013 012 011 I 010 I

DATA·IN REGISTER IORI

007 I 006 I 005 I 004 I 003 I 002 I 001 I 000 I

DATA·OUT REGISTER IOWI

The data-In register is used to move data from the GPIB to the microprocessor or to memory when the 8291 is

addressed to listen. Incoming information is separately latched by this register, and its contents are not destroyed by a write to the data-out register. The RFD (Ready for Datal message is held false until the byte is removed from the data In register, either by the microprocessor or by DMA. The 8291 then completes the handshake automati- cally. In RFD/DAV holdoff mode (see Auxiliary Register AI, the handshake is not finished until a command is sent telling the 8291 to release the holdoff. In this way, the same byte may be read several times, or an over anxious talker may be held off until all available data has been processed.

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