Intel mcs-48 manual 2716, Device Operation

2716

ERASURE CHARACTERISTICS

The erasure characteristics of the 2716 are such that erasure begins to occur when exposed to light with wavelengths shorter than approximately 4000 Angstroms (A). It should be noted that sunlight and certain "types of fluorescent lamps have wavelengths in the 3000-4000A range. Data show that constant exposure to room level fluorescent lighting could erase the typical 2716 in approximately 3 years, while it would take approximatley 1 week to cause erasure when exposed to direct sunlight. If the 2716 is to be exposed to these types of lighting conditions for ex· tended periods of time, opaque labels are available from Intel which should be placed over the 2716 window to prevent unintentional erasure.

The recommended erasure procedure (see Data Catalog PROM/ROM Programming Instruction Section) for the 2716 is exposure to shortwave ultraviolet light which has a wavelength of 2537 Angstroms (A). The integrated dose (i.e., UV intensity X exposure time) for erasure should be

aminimum of 15 W-sec/cm 2. The erasure time with this dosage is approxirnatdy i 5 to 20 minutes using an uitra- violet lamp with a 12000 pW/cm 2 power rating. The 2716 should be placed within 1 inch of the lamp tubes during erasure. Some lamps have a filter on their tubes which should be removed before erasure.

DEVICE OPERATION

The five modes of operation of the 2716 are listed in Table

I.It should be noted that all inputs for thefive modes are at TTL levels. The power supplies required are a +5V Vcc and a Vpp. The Vpp power supply must be at 25V during the three programming modes, and must be at 5V in the other two modes.

TABLE I. MODE SELECTION

~	CE/PGM	DE	Vpp	Vee	OUTPUTS
	(181	(201	(211	(24)	(9.11,13-17)
MODE
Read	V'L	V'L	+,	+,	DOUT
Standby	V'H	Don't Care	+,	+,	High Z
Program	Pulsed VIL to VIH	V'H	+25	+,	D'N
Program Verify	V'L	V'L	+2'	+,	DOUT
Program Innibit	V'L	V'H	+2'	+,	High Z

READ MODE

The 2716 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. OUtput Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs 120 ns (tOE) after the falling edge of OE, assuming that CE has been low and addresses have been stable for at least tACC - tOE,

STANDBY MODE

The 2716 has a standby mode which reduces the active power dissipation by 75%, from 525 mW to 132 mW. The 2716 is placed in the standby mode by applying a TTL high signal to the CE input. When in standby mode, the outputs are in a high impedence state, independent of the DE input.

OUTPUT OR-TIEING

Because 2716's are usually used in larger memory arrays, Intel has provided a 2 line control function that accomo- dates this use of multiple memory connections. The two line control function allows for:

a)the lowest possible memory power dissipation, and

b)complete assurance that output bus contention will not occur.

To most efficiently use these two control lines, it is recom- mended that CE (pin 18) be decoded and used as the primary device selecting function, while OE (pin 20) be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device.

PROGRAMMING

Initia;Jy, cmu oTter each erasure, aii bits of the 2/10 are in the "1" state. Data is introduced by selectively program- ming "O's" into the desired bit locations. Although only "O's" will be programmed, both "l's" and "O's" can be presented in the data word. The only way to change a "0" to a "1" is by ultraviolet light erasure.

The 2716 is in the programming mode when the Vpp power supply is at 25V and OE is at V IH. The data to be pro- grammed is applied 8 bits in parallel to the data output pins. The levels required for the address and data inputs are

TTl.

When the address and data are stable, a 50 msec, active high, TTL program pulse is applied to the CE/PGM input. A program pulse must be applied at each address location to be programmed. You can program any location at any time - either individually, sequentially, or at random. The program pulse has a maximum width of 55 msec. The 2716 must not be programmed with a DC signal applied to the CE/PGM input.

Programming of multiple 2716s in parallel with the same data can be easily accomplished due to the simplicity of the programming requirements. like inputs of the paral- leled 2716s may be connected together when they are pro- grammed with the same data. A high level TTL pulse applied to the CE/PGM input programs the paralleled 2716s.

PROGRAM INHIBIT

Programming of multiple 2716s in parallel with different data is also easily accomplished. Except for CE/PGM, all like inputs (including OE) of the parallel 2716s may be common. A TTL level program pulse applied to a 2716's CE/PGM input with Vpp at 25V will program that 2716. A low level CE/PGM input inhibits the other 2716 from being programmed.

PROGRAM VERIFY

A verify should be performed on the programmed bits to determine that they were correctly programmed. The verify may be performed wth Vpp at 25V. Except during pro- gramming and program verify, Vpp must be at 5V.

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AFN-00911 A-oS