Intel mcs-48 Initialization Command Words 1 and 2 ICW1,ICW2, Initialization Command Word 3 ICW3

8259A

INITIALIZATION COMMAND WORDS 1 AND 2 (ICW1,ICW2)

As-A1S:Page starting address of service routines. In an MCS 80/85 system, the 8 request levels will generate CALls to 8 locations equally spaced in memory. These can be programmed to be spaced at intervals of 4 or 8 memory locations, thus the 8 routines will occupy a page of 32 or 64 bytes, respectively.

The address format is 2 bytes long (Ao-A1S)'When the routine interval is 4, Ao-A4 are automatically inserted by the 8259A, while As-Al s are programmed externally. When the routine interval Is 8, Ao-As are automatically inserted by the 8259A, while A6-A1S are programmed externally.

The a·byte interval will maintain compatibility with cur- rent software, while the 4-byte interval is best for a com- pact jump table.

In an MeS-86 system A1S-Allare inserted in the five most significant bits of the vectoring byte and the 8259A seis ilie iI""" illasi signiiicant bits accorolng to the interrupt level. Al0-As are ignored and ADI (Address Interval) has no effect.

LTIM: If LTIM = 1, then the 8259A will operate in the level Interrupt mode. Edge detect logic on the Interrupt Inputs will be disabled.

ADI: CALL address Interval. ADI = 1 then Interval = 4; ADI = 0 then Interval = 8.

SNGL: Single. Means that this Is the only 8259A In the system. If SNGL= 1 no ICW3 will be Issued.

IC4: If this bit Is set - ICW4 has to be read. If ICW4 Is not needed, set IC4 = O.

I	AO	D7	De	D5	D4
	0	A7	Ae	A5
I					I
	1	A15	1114	A13	A12

INITIALIZATION COMMAND WORD 3 (ICW3)

This word is read only when there is more than one 8259A in the system and cascading is used, in which case SNGL = O. It will load the 8-bit slave register. The functions of this register are:

a.In the master mode (either when SP = 1, OJ in buttered mode when MIS = 1 in ICW4) a "1" is set for each slave in the system. The master then will release byte 1 of the call sequence (for MCS-SO/S5 system) and will enable the corresponding slave to release bytes 2 and 3 (for MCS-S6 only byte 2) through the cascade lines.

b.In the slave mode (either when SP = 0, or if BUF = 1 and MIS = 0 in ICW4) bits 2-0 identify the slave. The slave compares its cascade Input with these bits and, if they are equal, bytes 2 and 3 of the call sequence (or just byte 2 for MCS-86) are released by it on the Data Bus.

INITIALIZATION COMMAND WORD 4 (lCW4)

SFNM: If SFNM = 1 the special fully nested mode Is programmed.

BUF: If BUF = 1 the buffered mode is programmed. In buffered mode SP/EN becomes an enable output and the masterlslave determination Is by MIS.

MIS: If buffered mode Is selected: MIS = 1 means the 8259A is programmed to be a master, MIS = 0 means the 8259A is programmed to be a siave. If BUF = 0, MIS has no function.

AEOI: If AEOI = 1 the automatic end of Interrupt mode Is programmed.

,",PM: Microprocessor mode: ,",PM =0 sets the 8259A for MCS-80/85system operation, ,",PM = 1 sets the 8259A for MCS-86 system operation.

D3D2DlDO

lTIM ADI SNGl IC4j ICWI

AllAl0AIAljlCW2

r----------(-~~.~~....

I	1	S7	se	SS	54	S3	52	SI	so j'CW3
~	--------------------				r-t	------------------			~
,.------------					~~~~."
I	1				SFNM	aUF	MIS	AEO'
			I		t		I
				READY TO ACCEPT REQUESTS

IN THE FUllY NESTED MODE

Figure 1_ Initialization Sequence

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