8022

SINGLE COMPONENT a-BIT MICROCOMPUTER

WITH ON-CHIP AID CONVERTER

8-Bit CPU, ROM, RAM, 1/0 in Single 40-Pin

Package

On-Chip 8-Bit AID Converter; Two Input

Channels

8 Comparator Inputs (Port 0)

Zero-Cross Detection Capability

Single SV Supply (4.SV to 6.SV)

High Current Drive Capability-2 Pins

Two Interrupts-External and Timer

2K x 8 ROM, 64 x 8 RAM, 28 1/0 Lines

8.38 ,usec Cycle; All Instructions 1 or 2

Cycles

Instructions-8048 Subset

Interval Timer IEvent Counter

Clock Generated with Single Inductor or Crystal

Easily Expanded 1/0

The Intel@) 8022 is the newest member of the MCS-48™ family of single chip 8-bit microcomputers_ It is designed to satisfy the requirements of low cost, high volume applications which involve analog signals, capacitive touchpanel keyboards, and I or large ROM space. The 8022 addresses these applications by integrating many new functions on- chip, such as AID conversion, comparator inputs and zero-cross detection.

The features of the 8022 include 2K bytes of program memory (ROM), 64 bytes of data memory (RAM), 28 110 lines, an on-chip AID converter with two input channels, an 8-bit port with comparator inputs for interfacing to low voltage capacitive touchpanels or other non-TIL interfaces, external and timer interrupts, and zero-cross detection capabili- ty. In addition, it contains the 8-bit interval timer I event counter, on-board oscillator and clock circuitry, single 5V power supply requirement, and easily expandable 1/0 structure common to all members of the MCS.-48 family.

The 8022 is designed to bean efficient controller as well as an arithmetic processor. It has bit handling capability plus facilities for both binary and BCD arithmetic. Efficient use of program memory results from using the MCS-48 instruction set which consists mostly of single byte instructions and has extensive conditional jump and direct table lookup capability. Program memory usage is further reduced via the 8022'shardware implementation of the AID converter which simplifies interfacing to analog signals.

PIN CONFIGURATION

 

LOGIC SYMBOL

BLOCK DIAGRAM

 

 

Vee

Vss

 

 

 

XTAL r

PORTO

 

 

 

THRESHOLD

 

P26

Vee

REFERENCE , -___----,

 

 

 

P21

P2S

 

 

 

AVec

P2'

 

 

 

VAREF

PROG

REseT ....

 

 

ANl

P23

 

 

 

 

P22

 

 

 

AVSS

P21

TEST 0..

 

 

 

 

 

TO

P20

 

8022

 

 

P11

 

 

 

TEST 1

 

 

 

Pl.

 

 

 

 

 

 

 

P1S

 

 

 

P02

Pl'

 

 

 

P03

P13

AlD

 

 

REFERENCE

 

 

 

P12

 

 

P04

 

 

 

POS

P11

 

 

 

PO.

Pl.

AND ...

ADDRESS

 

P01

RESET

LATCH

 

 

ENABLE

 

ALE

XTAL 2

 

 

 

 

 

T1

XTAL 1

 

 

 

Vss

SUBST

ANl

PORT

 

 

 

 

 

 

 

--EXPANDER

 

 

 

 

STROBE

 

 

 

 

I

 

 

 

AID

AID SUBSTRATE

 

 

 

Vee

Vas

 

 

 

 

6-51

AFN-00187A-o1

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Image 194
Intel mcs-48 manual 8022