Intel mcs-48 manual Description, Internal Registers

Models: mcs-48

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8155/8156/8155-2/8156-2

DESCRIPTION

The 8155/8156 contains the following:

2k Bit Static RAM organized as 256 x 8

Tw08-bit 1/0 ports (PA & PB) andone6-bit 110 port (PC)

• .14-bit timer-counter

.

The 101M (IO/Memory Select) pin selects either the five registers (Command. Status. PAo-7. PBO-7. PCO-5) or the memory (RAM). portion. (See Figure 1.)

The 8-bit address on the AddresslData lines. Chip Enable input CE or CEo and 101M are all latched on-chip at the falling edge of ALE. (See Figure 2.)

II

II

II

I

I

I

I

I

I

I

I

I

I

I

I

I

I

IL ____ _

_________ ..JI

Figure 1. 8155/8156 Internal Registers

C'E181551

\

/

\

 

 

 

OR

 

 

 

CE 181561

101M

A°0-7

I\/

\

 

/

\

 

 

 

I

 

ADDRESS

I\.

/

X

V

I\. X DATA VALID

 

ALE

RDORWR

NOTE: FOR OETAILEO TIMING INFORMATION, SEE FIGURE 12 ANO A.C. CHARACTERISTICS.

Figure 2. 8155/8156 On-Board Memory Read/Wrlte Cycle

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Page 227
Image 227
Intel mcs-48 manual Description, Internal Registers