INSTRUCTION

 

INA,P

 

QUTL P,A

 

ANLP.=OATA

 

QRL P, ::DATA

 

INS A. BUS

 

OUTLBUS.A

 

ANL BUS, :rDATA

 

ORL BUS, 4JATA

'l'-

MOVX@lR.A

MOVXA,OR

 

MOVDA,Pi

 

MOVDPj,A

 

ANLDP,A

 

ORLD P,A

 

J ICONDITIONAL)

 

STRT T

 

STRT CNT

 

STOP TCNT

 

EN.

 

DIS I

 

ENTOCLK

S1

 

52

FETCH

 

INCREMENT

INSTRUCTION

·PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

·

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

·

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

·

 

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

·

 

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

FETCH

 

INCREMENT

INSTRUCTION

PROGRAM COUNTER

·

 

-

 

-----------

CYCLE 1

S3

--

--

--

--

--

--

--

--

OUl'PUTRAM

ADDRESS

OUTPUT RAM

ADDRESS

OUTPUT

OPCODE/ADDRESS

OUTPUT

OPCODE/ADDRESS

OUTPUT

QPCODE/ADDRESS

OUTPUT

OPCODE/ADDRESS

SAMPLE

CONDITION

--

--

--

--

--

54

S5

INCREMENT

--

TIMER

 

INCREMENT

OUTPUT

TIMER

TO PORT

INCREMENT

READ PORT

TIMER

 

INCREMENT

READ PORT

TIMER

 

INCREMENT

--

TIMER

INCREMENT

OUTPUT

TIMER

TOPQRT

INCREMENT

READ PORT

TIMER

 

INCREMENT

READ PORT

TIMER

 

INCREMENT

OUTPUT

TIMER

DATA TO RAM

INCREMENT

--

TIMER

INCREMENT

--

TIMER

INCREMENT

OUTPUT DATA

TIMER

TOP2LOWER

INCREMENT

OUTPUT

TIMER

DATA

INCREMENT

OUTPUT

TIMER

DATA

INCREMENT

--

TIMER

 

--START COUNTER

--STOP COUNTER

ENABLE--

INTERRUPT

DISABLE--

INTERRUPT

ENABLE--

CLOCK

CYCLE 2

S1

S2

·

53

54

55

--

READ PORT

--

--

--

--

--

·

--

--

--

FETCH

--

 

INCREMENT

OUTPUT

--

IMMEDIATE DATA

·PROGRAM COUNTER

TO PORT

FETCH

--

· INCREMENT

OIffi'UT

--

IMMEDIATE DATA

 

PROGRAM COUNTER

TO PORT

 

--

READ PORT

·

--

--

--

--

--

·

--

--

--

FETCH

--

 

IHCREMENT

OUTPUT

--

IMMEDIATE DATA

·PROGRAM COUNTER

TO PORT

FETCH

--

 

INCREMENT

OllTl'UT

--

IMMEDIATE DATA

·PROGRAM COUNTER

TO PORT

--

--

·

--

--

--

--

READ DATA

·

--

--

--

--

P2 LOWER

·

--

--

--

 

READ

 

 

 

 

--

--

·

--

--

--

--

--

·

--

--

--

--

--

·

--

--

--

FETCH

--

 

UPDATE

--

--

IMMEDIATE DATA

·PROGRAM COUNTER

·VALID INSTRUCTION ADDRESSES ARE OUTPUT AT THIS TIME IF EXTERNAL PROGRAM MEMORY IS BEING ACCESSED.

!!

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INSTRUCTION TIMING DIAGRAM

Page 38
Image 38
Intel mcs-48 manual 111, Instruction