Intel mcs-48 manual 8041 Al8641 Al8741 a

Mnemonic	Deecrlpllon
CONTROL
EN DMA	Enable DMA Handshake Lines
EN I	Enable IBF Interrupt
DIS I	Disable IBF Interrupt
EN FLAGS	Enable Master Interrupts
SEL RBO	Select register bank 0
SEL RBI	Select register bank,1
NOP	No Operation
REGISTERS
INC Rr	Increment register
INC@Rr	Increment data memory
DEC Rr	Decrement register
SUBROUTINE
CALL addr	Jump to subroutine
RET	Return
RETR	Return and restore status
FLAGS
CLRC	Clear Carry
CPLC	Complement Carry
CLR FO	Clear Flag 0

8041 Al8641 Al8741 A

BYt•• Cycl..	Mnemonic	D•• crlpllon
	CPL FO	Complement Flag 0
	CLR Fl	Clear Fl Flag
	CPL Fl	Complement Fl Flag
	BRANCH
	JMP addr	Jump unconditional
	JMPP@A	Jump Indirect
	OJ NZ Rr, addr	Decrement register and jump
	JC addr	Jump on Carry = 1
	JNC addr	Jump on Carry = 0
	JZ addr	Jump on A Zero
	JNZ addr	Jump on A not Zero
	JTO addr	Jump on TO= 1
2	JNTO addr	Jump on TO=O
	JT1 addr	Jump on Tl = 1
2	JNT1 addr	Jump on Tl =0
2	JFO addr	Jump on FO Flag = 1
	JFl addr	Jump on Fl Flag = 1
	JTF addr	Jump on Timer Flag = 1, Clear Flag
	JNIBF addr	Jump on IBF Flag = 0
	JOBF addr	Jump on OBF Flag = 1
	JBb addr	Jump on Accumulator Bit

Byte. CyCle.

2 2

12

22

22

2 2

2 2

,2 2

22

2	2
2	2
2	2
2	2

22

2	2
2	2

22

22

APPLICATIONS

DATAK===J[==~~~

aoaSA	TO
	PERIPHERAL
	DEVICES

ADDR

CONTROL~==::11S,.J

Figure 1, 808SA-8041AInterface

8243KEYBOARD

EXPANDERMATRiX

PORT,2

8041 Al8741 A

DATA BUS

CONTROL BUS

iiii			iiii	~
8048 WR			WR 8041A1	TO
				PERIPHERAL
PORT	CONTROL	2	cs 8741A	~ DEVICES
			AO	I+-To
BUS	DATA BUS	8 DBB		- Tl

Figure 2. 8048,..8041A Interface

z		z
	:I	0
0		.~0.
>=~ Ita:
..	0	W
0	II.	Cl
Z	0-	W
		II.
iii:0-	e	'"
		Z
		::;

PORT 2

8041A18741A

CONTROL BUS

Figure 3, 8041A-8243Keyboad Scanner Figure 4. 8041A Matrix Printer Interface

9-126 00l88A