Intel mcs-48 manual AI? Latch, Rom

EXPANDED MCS-48 SYSTEM

PROGRAM MEMORY

	=4=======::;-;:=~DECODER 0, r---...,i ---- ICS		27081
PORT 20·3 J:			2308	1K·2K
		1 OF 4
ALE 1 ----- +1
	8212	10
8048	LATCH	cs	27081
				2K·3K
			2308

PSEN~----------------------~

cs 27081 3K ·4K 2308

USING lK x 8 PROM/ROM

DATA

OUT

EXPANDING MCS-48 ™ PROGRAM MEMORY USING STANDARD MEMORY PRODUCTS

Also shown is the addition of 2K words of program memory using an 2316A 2K x 8 ROM to give a total of 3K words of program memory. In this case no chip select decoding is required and PSEN enables the memory directly through the chip select input. If the system requires only 2K of program the same configuration can be used with an 8035 substituted for the 8048. The 8049 would provide 4K with the same configuration.

The next figure shows how the new 8755/8355 EPROM/ROM with I/O interfaces directly to the 8048 without the need for an address latch. The 8755/8355 contains an internal 8-bit address latch eliminating the need for an 8212 latch. In addition to a 2K X 8 program memory the 8755/8355 also contains 16 I/O lines addressable as two 8-bit ports. These ports are addressed as external RAM; there-

3

PORT 20·22

8048 ALE	"'7	'"
	8212	11)

AI?> LATCH

BUS B

PSEN

ADDRESS

2316

ROM

DATA

OUT

CS

USING 2K x 8 ROM

EXPANDING MCS-48™PROGRAM MEMORY USING STANDARD MEMORY PRODUCTS

3·3