Intel mcs-48 manual Word enabled onto the data bus during m5 is, Wol, END of Interrupt EOI

Models: mcs-48

1 478
Download 478 pages 26.88 Kb
Page 364
Image 364

8259A

POLL

In this mode the microprocessor internal Interrupt Enable flip-flop Is reset, disabling its interrupt input. Service to devices is achieved by programmer Initiative using a Poll command.

The Poll command Is Issued by setting P= "1" in OCW3. The 8259A treats the next AD pulse to the 8259A (i.e., RD = 0, ~ = 0) as an interrupt acknowledge, sets the appropriate IS bit If there is a request, and reads the priority level. Interrupt is frozen from WR to RD.

The word enabled onto the data bus during m5 is:

07 De 05 o.

03

02

01

00

1 I

 

W2

WI

wol

WO-W2: Binary code of the highest priority level requesting service.

I: Equal to a "1" if there is an interrupt.

This mode Is useful if there is a routine command com· mon to several levels so that the fNTA sequence is not

needed (saves ROM space). Another application is to use the poll mode to expand the number of priority levels to more than 64.

END OF INTERRUPT (EOI)

The In Service (IS) bit can be reset either automatically following the trailing edge of the last in sequence INTA pulse (when AEOI bit in ICW1 is set) or by a command word that must be issued to the 8259A before returning from a service routine (EOI command). An EOI command must be issued twice, once for the master and once for the corresponding slave if slaves are in use.

There are two forms of EOI command: Specific and Non· Specific. When the 8259A Is operated in modes which preserve the fully nested structure, it can determine which IS bit to reset on EOL When a Non-Specific EOI command is issued the 8259A will automatically reset the highest IS bit of those that are set, since in the nested mode the highest IS level was necessarily the last level acknowledged and serviced.

However, when a mode is used which may disturb the fully nested structure, the 8259A may no longer be able to determine the last level acknowledged. In this case a Specific End of Interrupt (SEOI) must be issued which Includes as part of the command the IS level to be reset. EOI is issued whenever EOI = 1, in OCW2, where LO-L2 is the binary level of the IS bit to be reset. Note that although the Rotate command can be issued together with an EOI where EOI = 1, it is not necessarily tied to it.

It should be noted that an IS bit that is masked by an IMR bit will not be cleared by a non·specific EOI if the 8259A Is in the Special Mask Mode.

AUTOMATIC END OF INTERRUPT (AEOI) MODE

If AEOI = 1 In ICW4, then the 8259A will operate in AEOI mode continuously until reprogrammed by ICW4. In this mode the 8259A will automatically perform a non· specific EOI operation at the trailing edge of the last interrupt acknowledge pulse (third pulse in MCS·80/85,

second in MCS·86).Note that from a system standpoint, this mode should be used only when a nested multilevel interrupt structure is not required within a single 8259A.

To achieve automatic rotation (Rotate Mode A) within AEOI, there is a special rotate flip-flop. It is set by OCW2 with R= 1, SEOI = 0, EOI = 0, and cleared with R= 0, SEOI = 0, EOI = O.

ROTATING PRIORITY MODE A (AUTOMATIC ROTATION) FOR EQUAL PRIORITY DEVICES

In some applications there are a number of interrupting devices of equal priority. In this mode a device, after being serviced, receives the lowest priority, so a device requesting an interrupt will have to wait, in the worst case until each of 7 other devices are serviced at most once. For example, if the priority and "in service" status is:

Before Rotate (IR4 the highest priority requiring service)

 

IS7 lSI ISS IS. IS3 152 IS1 ISO

"IS" Status

10111011101010101

 

Low•• 1Priority

Hlgh•• 1Prlorlly

Priority Status

1716 15 I • I 3

12 I ho I

 

 

After Rotate (IR4 was serviced, all other priorities rotated correspondingly)

IS7 lSI ISS IS. IS3 IS2 151 ISO

"IS" Slatus 10111010101010101

 

Hlgh.1I Prlorlly

Low•• t Prlorlly

Priority Status

1

2

1

11

0

7E04131

 

 

 

 

 

The Rotate command mode A is issued in OCW2 where: R = 1. EOI = 1. SEOI = O. Internal status is updated by an End of Interrupt IEOI or AEOII command. If R= 1, EOI = 0, SEOI = 0, a "Rotate-A" flip-flop is set. This is useful in AEOI, and described under Automatic End of Interrupt.

ROTATING PRIORITY MODE B (ROTATION BY SOFTWARE)

The programmer can change priorities by programming the bottom priority and thus fixing all other priorities; i.e., if IR5 is programmed as the bottom priority device, then IR6 will have the highest one.

The Rotate command is issued in OCW2 where: R= 1, SEOI = 1; LO- L2 is the binary priority level code of the bottom priority device.

Observe that In this mode internal status is updated by software control during OCW2. However, it is independ- ent of the End of Interrupt (EOI) command (also exe· cuted by OCW2). Priority changes can be executed duro ing an EOI command or independently.

9-49

Page 364
Image 364
Intel mcs-48 Word enabled onto the data bus during m5 is, Wol, END of Interrupt EOI, Automatic END of Interrupt Aeoi Mode