Intel mcs-48 manual Interrupts in Microcomputer Systems, 8259A Basic Functional Description

8259A

INTERRUPTS IN MICROCOMPUTER SYSTEMS

Microcomputer system design requires that 1/0 devices such as keyboards, displays, sensors and other com-

ponents receive servicing in an efficient manner so that large amounts of the total system tasks can be assumed by the microcomputer with little or no effect on through- put.

match his system requirements. The priority modes can be changed or reconfigured dynamically at any time dur- ing the main program. This means that the complete interrupt structure can be defined as required, based on the total system environment.

The most common method of servicing such devices is the Polled approach. This is where the processor must test each device in sequence and in effect "ask" each one if it needs servicing. It is easy to see that a large por- tion of the main program is looping through this con- tinuous polling cycle and that such a method would have a serious, detrimental effect on system through- put, thus limiting the tasks that could be assumed by the microcomputer and reducing the cost effectiveness of using such devices.

A more desirable method would be one that would allow the microprocessor to be executing its main program and only stop to service peripheral devices when it is told to do so by the device itself. In effect, the method would provide an external asynchronous input that would inform the processor that it should complete whatever instruction that is currently being executed and fetch a new routine that will service the requesting device. Once this servicing is complete, however, the processor would resume exactly where it left off.

This method is called Interrupt. It is easy to see that system throughput would drastically increase, and thus more tasks could be assumed by the microcomputer to further enhance its cost effectiveness.

The Programmable Interrupt Controller (PIC) functions as an overall manager in an Interrupt-Driven system environment. It accepts requests from the peripheral equipment, determines which of the incoming requests is of·the highest importance (priority), ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination.

Each peripheral device or structure usually has a special program or "routine" that Is associated with its specific functional or operational requirements; this Is referred to as a "service routine". The PIC, after issuing an Inter- rupt to the CPU, must somehow input information into the CPU that can "point" the Program Counter to the service routine associated with the requesting device. This "pointer" is an address In a vectoring table and will often be referred to, In this document, as vectoring data.

8259A BASIC FUNCTIONAL DESCRIPTION

GENERAL

The 8259A Is a device specifically designed for use in real time, Interrupt driven microcomputer systems. It Manages eight levels or requests and has built-In fea- tures for expandabillty to other 8259A's(up to 64 levels). It is programmed by the system's·software as an 1/0 peripheral. A selection of priority modes Is available to the programmer so that the manner In which the re- quests are processed by the 8259A can be configured to

CPU

RAM

ROM

Polled Method

CPU INT

RAM

ROM

Interrupt Method

CPU·DRIVEN

MULTIPLEXOR

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