8243

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GUARANTEED WORST CASE CURRENT SINKING CAPABiliTIES OF ANY I/O PORT PIN vs. TOTAL SINK CURRENT OF All PINS

o L --L__~~~-L__~~__- L__~~__- L__~~__~

o 2 3 4 5 6 7 8 9 10 11 12 13

MAXIMUM SINK CURRENT ON ANY PIN@.45V

MAXIMUM 10L WORST CASE PIN (mA)

Sink Capability

The 8243 can sink 5 mA@.45Von each of its 16 I/O lines simultaneously. If, however, all lines are not sinking simultaneously or all lines are not fully loaded, the drive capability of any individual line increases as is shown by the accompanying curve.

For example, if only 5 of the 16 lines are to sink current at one time, the curve shows that each of those 5 lines is capable of sinking 9 mA@.45V (if any lines are to sink 9 mA the total 10l must not exceed 45 mA or five 9 mA loads).

Example: How many pins can drive 5 TTL loads (1.6 mAl assuming remaining pins are unloaded?

10l = 5 x 1.6 mA = 8 mA dOL = 60 mA from curve

#pins=60 mA ... 8 mA/pin=7.5=7

In this case, 7 lines can sink 8 mA for a total of 56 mAo This leaves 4 mA sink current capa- bility which can be divided in any way among the remaining 8 I/O lines of the 8243.

Example: This example shows how the use of the 20 mA sink capability of Port 7 affects the sink- ing capability of the other I/O lines.

An 8243 will drive the following loads simul- taneously.

2 loads - 20 mA@ 1V (port 7 only)

8 loads - 4 mA@.45V

6 loads - 3.2 mA@ .45V

Is this within the specified limits?

dOl =( 2 x 20)+(8 x 4)+(6 x 3.2)=91.2 mAo From the curve: for 10l = 4 mA, dOL:: 93 mA since 91.2 mA < 93 mA the loads are within specified limits.

Although the 20 mA@1V loads are used in calculating dOL, it is the largest current re- quired@.45Vwhich determines the maximum allowable dOL'

Note: A 10 to 50Kn pullup resistor to +5V should be added to 8243 outputs when driving to 5V CMOS directly.

6-61

AFN-00214A-Q5

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Image 204
Intel mcs-48 manual 125