Intel mcs-48 manual Viu, IU1

Models: mcs-48

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8041 AJ8641 AJ8741 A

ABSOLUTE MAXIMUM RATINGS·

Ambient Temperature Under Bias

O·Cto 70·C

Storage Temperature

- 65·Cto + 150·C

Voltage on Any Pin With Respect

 

to Ground

0.5V to + 7V

Power Dissipation

1.5 Watt

'COMMENT: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This Is a stress rating only and functional operation of the device at these or any other conditions above those indicated In the operational sections of this specification is not implied. Exposure to absolute maximum rating con· ditlons for extended periods may affect device reliability.

D.C. AND OPERATING CHARACTERISTICS

TA= O·Cto 70·C, Vss=OV, 8041 A: Vee= Voo= +5V± 10%, 8741A: Vee = Voo= +5V± 5%

 

Symbol

Parameter

Min.

Max.

Unit

Test Conditions

VIL

Input Low Voltage (Except XTAL 1, XTAL2, RESET)

-0.5

0.8

V

 

VIU

Input Low Voltage (XTAL1, XTAL2, RESET)

-0.5

0.6

V

 

VIH

Input High Voltage (Except XTAL1, XTAL2, RESET)

2.2

Vee

 

 

VIH1

Input High Voltage (XTAL1, XTAL2, RESET)

3.8

Vee

V

 

VOL

Output Low Voltage (00-07)

 

0.45

V

IOL=2.0 mA

Vou

Output Low Voltage (P1QP 17 , P20 P27 , Sync)

 

0.45

V

10L = 1.6 mA

VOL2

Output Low Voltage (Prog)

 

0.45

V

IOL = 1.0 mA

VOH

Output High Voltage (00-07)

2.4

 

V

10H= - 4OO I'A

VOH1

Output High Voltage (All Other Outputs)

2.4

 

V

10H= -50 I'A

IlL

Input Leakage Current (To, T1, RD, WR, CS, Ao, EA)

 

±10

I'A

Vss :S VIN :S Vee

loz

Output Leakage Current (00-0 7, High Z State)

 

± 10

I'A

Vss +0.45 :S VIN:s Vee

lu

Low Input Load Current (P1QP 17 , P20 P27)

 

0.5

mA

VIL = 0.8V

IU1

Low Input Load Current (RESET, SS)

 

0.2

mA

VIL =0.8V

100

Voo Supply Current

 

15

mA

Typical = 5 mA

lee+ 100

Total Supply Current

 

125

mA

Typical = 60 mA

A.C. CHARACTERISTICS

TA= o·c to 70·C, Vss=OV, 8041A: Vee= Voo= + 5V ± 10%, 8741A: Vee= Voo= + 5V ± 5%

DBB READ

Symbol

Parameter

Min.

Max.

Unit

Test Conditions

tAR

CS, Ao Setup to RDi

0

 

ns

 

tRA

CS, Ao Hold After m51

0

 

n5

 

tRR

RD Pulse Width

250

 

ns

 

tAD

CS, Ao to Data Out Delay

 

225

ns

CL =150pF

t RO

RDi to Data Out Delay

 

225

ns

CL= 150 pF

tOF

ROI to Data Float Delay

 

100

ns

 

tey

Cycle Time (Except 8741A·8)

2.5

15

1'5

6.0 MHz XTAL

tey

Cycle Time (8741A·8)

4.17

15

I's

3.6 MHz XTAL

DBB WRITE

 

 

 

 

 

Symbol

Parameter

Min.

Max.

Unit

Test Conditions

tAW

CS, Ao Setup to WRi

0

 

ns

 

tWA

CS, Ao Hold After WAt

0

 

ns

 

tww

iiVA Pulse Width

250

 

ns

 

tow

Data Setup to WRt

150

 

ns

 

two

Data Hold After'i}J'R

0

 

ns

 

9-127

00188A

 

Page 442
Image 442
Intel mcs-48 manual Viu, IU1