Intel mcs-48 manual IntJ18049/8039, Til

intJ18049/8039

INSTRUCTION SET

	Mne....nic	Dnc:rlption	Bytes	Cycl.
	ADDA.R	Add register to A	I
	ADD A.@IR	Add data memory to A	I
	ADD A. #data	Add immediate to A	2	2
	ADDCA.R	Add register with carry		1
	ADDCA.@R	Add data memory with carry	I	I
	ADDC A, #data	Add immediate with carry	2	2
	ANL A, R	And register to A
	ANLA,@R	And data memory to A	1	I
..~	ANL A, #data	And immediate to A	2	2
	ORL A, R	Or register to A
	ORLA,@R	Or data memory to A
	ORL A, #data	Or immediate to A	2	2
E"	XRLA, R	Exclusive Or ragister to A
ii	XRLA,@R	Exclusive or data memory to A	I
C	XRLA, #data	Exclusive or immediate to A	2	2
	INCA	Increment A
	DEC A	Decrement A
	CLR A	Clear A
	CPLA	Complement A
	DAA	Decimal Adjust A
	SWAP A	Swap nibbles of A
	RLA	Rotate A left
	RLCA	Rotate A left through carry
	RRA	Rotate A right
	RRCA	Rotate A .right through carry
	INA,P	Input port to A		2
	OUTLP,A	Output A to port		2
i	ANL P, #data	And immediate to port	2	2
	ORL P, #data	Or immediate to port	2	2
;	INSA, BUS	Input BUS to A		2
!2	OUTL BUS, A	Output A to BUS	1	2
;Q.	ANL BUS, #data	And immediate to BUS	2	2
.5	ORL BUS,#data	Or immediate to BUS	2	2
	MOVDA, P	Input Expander port to A		2
	MOVDP,A	Output A to Expander port		2
	ANLD P,A	A nd A to Expander port		2
	ORLD P, A	Or A to Expander port		2
•••	INCR	Increment register
	INC@R	Increment data memory
~r	DECR	Decrement reg ister
	JMP addr	Jump unconditional	2	2
	JMPP@A	Jump indirect	1	2
	DJNZ R, addr	Decrement register and skip	2	2
	JCaddr	Jump on Carry = I	2	2
	JNC addr	Jump on Carry = 0	2	2
	J Z addr	Jump on A Zero	2	2
	JNZ addr	Jump on A not Zero	2	2
.t:	JTOaddr	Jump on TO = 1	2	2
u
"..	JNTO addr	Jump on TO= 0	2	2
til	JTl addr	Jump on T1 = 1	2	2
	JNTI addr	Jump on T1 = 0	2	2
	JFOaddr	Jump on FO= 1	2	2
	JFl addr	Jump on Fl = 1	2	2
	JTF addr	Jump on timer flag	2	2
	JNladdr	Jump on INT = 0	2	2
	JBbaddr	Jump on Accumulator Bit	2	2

	Mn..... nic		D-.iptlon	ByleS	Cycle.
.~		CALL	Jump to subroutine
!i
e		RET	Return		2
i		RETR	Return and restore status		2
III
		CLR C	Clear Carry
j		CPL'C	Complement Car'y
		CLR FO	Clear Flag 0
II.		CPL FO	Complement Flag 0
		CLR Fl	Clear Flag 1
		CPL FI	Complement Flag I
		MOVA,R	Move register to A		1
		MOVA,@R	Move Jata memory to A	I	1
		MOV A, #data	Move immediate to A	2	2
		MOVR,A	Move A to register
		MOV@R,A	Move A to data memory	I	1
!		MOV R, #data	Move immediate to register	2	2
		MOV @R, #data Move immediate to data memory		2	2
~..		Move A,PSW Move PSW to A
		MOV PSW, A	Move A to PSW
';;		XCH A, R	Exchange A a nd register
C
		XCHA,@R	Exchange A and data memory		1
		XCHD A,@R	Exchange nibble of A and register		1
		MOVXA,@R	Move external data memory to A		2
		MOVX@R,A	Move A to external data memory		2
		MOVPA,@A	Move to A from current page		2
		MOVP3 A,@A	Move to A from Page 3		2
I		MOVA, T	Read Timer/Counter
		MOVT,A	Load Timer/Counter
"		STRTT	Start Timer
§		STRT CNT	Start Counter
....~•		STOP TCNT	Stop Timer/Counter
		EN TCNTI	Enable Timer/Counter Interrupt	,I
		DIS TCNTI	Disable Timer/Counter Interrupt
		EN I	Enable external interrupt
		DISI	Disable external interrupt
~		SEL RBO	Select register bank 0
		SEL RBI	Select register bank I
~		SEL MBO	Select memory ban k 0
		SELMB1	Select memory bank I
		ENTOCLK	Enable Clock output O~ iO
		NOP	No Operatior.

Mnemonics copyright Intel Corporation 1976, 1977, 1978

643 AFN-00737-03