Intel mcs-48 manual High Current Outputs, Expanded 1/0, Test and Interrupt Inputs

SINGLE COMPONENT SYSTEM

this would include high noise margin inputs (Vee 12), unusual logic level inputs as from a diode isolated keyboard, analog channel expansion, and direct capacitive touchpanel interface. The com- parator action is automatic and the port is read just as any other port.

2.16.2 High Current Outputs

Very high current drive is desirable for minimizing external parts required to do high power control. P1a and P11 have been designated high drive out- puts capable of sinking 7mA at VSS + 2.5 volts. (For clarity, this is 7mA to VSS with a 2.5 volt drop across the buffer.) These pins may, of course, be paralleled for 14mA drive if the output logic states are always the same.

to the TO pin when external interrupt is enabled. Interrupt is level triggered and active low to allow "WIRE ORING" of several interrupt sources at the input pin. When an interrupt is detected, it causes a "jump to subroutine" at location 3 in program memory as soon as all other cycles of the current instruction are complete. At this time, the program counter contents are saved in the program counter stack, but the remaining status of the pro- cessor is not. Unlike the 8048, the 8022 does not contain a program status word. Thus, when ap- propriate, the carry and auxiliary carry flags are saved in software, as is the accumulator. The rou- tine shown below saves the accumulator and the carry flags in only four bytes.

Instructions Bytes Comments

2.16.3 Expanded 1/0

In addition to the 26 digital II 0 lines contained on- board the 8022, a user can obtain additional 1/0 lines by utilizing the Intel(!) 8243 I10 expander chip or standard TTL. The 8243 interfaces to 4 port lines of the 8022 (lower half of port 2) and is strobed by the PROG line of the 8022.

The interface procedure is exactly the same as with the 8021-see Section 2.9.3.

2.17 Test and Interrupt Inputs

In addition to the 24 general purpose II 0 lines which comprise ports 0, 1, and 2, the 8022 has two inputs which are testable via conditional jump instructions, TO and T 1. These pins allow inputs to cause program branches without the necessity to load an input port into the accumulator. TO and T1 have other functions as well.

The Test a pin serves as an external interrupt in- put as well as a testable input. An interrupt se- quence is initiated by applying a low "0" level input

MeV R6.A	1	;aave accumulator
CLR A		;clear accumulator
DAA		;convert carry flags into sixes
MeV R7.A		;save status of carry flags

The end of an interrupt service subroutine is marked by the execution of a Return from Interrupt instruction (RETI). Prior to returning from the inter- rupt subroutine, however, the status of the accu- mulator and the carry flags are restored in software. The following routine restores the sta- tus of the accumulator and the carry flags, which was previously saved, in five bytes.

Instructions	Bytes	Comments
MeV A,R7	1	;restore carry flaga status to
Add A,#OAAH	2	;accumulator and set/clear carry flags
MeV A,RS		;reatore accumulator
RETI		;return

The interrupt system is single level in that once an interrupt is detected, all further interrupt requests are ignored until execution of a RETI re-enables

					+5V
	r--_--~ XTAL 1
			r ---.......--- i XTAL 1		1K
OPTIONAL		... _ 1 _	D		J<>--__	1
		by'LC		1 MEGQ
C=20-5OpF
	L..	-_--...XTAL2	' ----.......---- . XTAL 2
				.6-3.6 MHz	NC	XTAL2
		INDUCTOR		CRYSTAL	EXTERNAL

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